0.1-μm InGa_0.53As/InAl_0.52As HEMT using a new sidewall process

This paper presents a new process for a 0.1-μm gate length and its application to a InGao_0.53As/InAl_0.52As high electron mobility transistor (HEMT). We have successfully developed a new sidewall process with Si₃N₄/SiO₂ films for the first time. The Si₃N₄/SiO₂ films are deposited and the gate foot is defined by using e-beam lithography before the formation of the T-gate. A gate length of 0.15 μm is achieved by using thin PMMA, which reduces forward scattering effect, and low-dose exposure of Si₃N₄/SiO₂ films, which reduces the backward scattering effect. The Si₃N₄ sidewall, which reduces the gate length to 0.1 μm, is formed by the re-deposition of Si₃N₄ and etchback with reactive ion etching. Because the SF₆/Ar gas mixture has good etch selectivity between Si₃N₄ and SiO₂ films, a vertical profile can be realized. This process enables us to realize a stable 0.1-μm gate length to increase the yields of devices. The 0.1-μm InGa_0.53As/InAl_0.52As HEMT's fabricated with the new sidewall process showed DC and microwave characteristics of G_m,max 750 mS/mm, BV_GD = -5.8 V, f_T = 140 GHz, f_max = 300 GHz.