TY - GEN
T1 - 3D IC-package-board co-analysis using 3D em simulation for mobile applications
AU - Kostka, Darryl
AU - Song, Taigon
AU - Lim, Sung Kyu
PY - 2013
Y1 - 2013
N2 - 3D IC based systems necessitate a chip-package co-design approach since the TSV response in the chip stack can propagate into the package. In this work, we demonstrate a chip-interposer co-analysis methodology that includes the 3D CAD model of the 3D IC and compare this to the conventional analysis techniques. Our findings demonstrate that the coupling between signal TSV's in the chip stack has a significant impact on the overall channel response and needs to be carefully modeled in order to obtain accurate results.
AB - 3D IC based systems necessitate a chip-package co-design approach since the TSV response in the chip stack can propagate into the package. In this work, we demonstrate a chip-interposer co-analysis methodology that includes the 3D CAD model of the 3D IC and compare this to the conventional analysis techniques. Our findings demonstrate that the coupling between signal TSV's in the chip stack has a significant impact on the overall channel response and needs to be carefully modeled in order to obtain accurate results.
UR - http://www.scopus.com/inward/record.url?scp=84883402689&partnerID=8YFLogxK
U2 - 10.1109/ECTC.2013.6575872
DO - 10.1109/ECTC.2013.6575872
M3 - Conference contribution
AN - SCOPUS:84883402689
SN - 9781479902330
T3 - Proceedings - Electronic Components and Technology Conference
SP - 2113
EP - 2120
BT - 2013 IEEE 63rd Electronic Components and Technology Conference, ECTC 2013
T2 - 2013 IEEE 63rd Electronic Components and Technology Conference, ECTC 2013
Y2 - 28 May 2013 through 31 May 2013
ER -