50-nm E-mode in0.7Ga0.3As PHEMTs on 100-mm InP substrate with fmax > 1 THz

Dae Hyun Kim; Jesús A. Del Alamo; Peter Chen; Wonill Ha; Miguel Urteaga; Berinder Brar

doi:10.1109/IEDM.2010.5703453

50-nm E-mode in_0.7Ga_0.3As PHEMTs on 100-mm InP substrate with f_max > 1 THz

Dae Hyun Kim, Jesús A. Del Alamo, Peter Chen, Wonill Ha, Miguel Urteaga, Berinder Brar

School of Electronics Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

26 Scopus citations

Abstract

We have demonstrated 50-nm enhancement-mode (E-mode) In _0.7Ga_0.3As PHEMTs with f_max in excess of 1 THz. The devices feature a Pt gate sinking process to effectively thin down the In_0.52Al_0.48As barrier layer, together with a two-step recess process. The fabricated device with L_g = 50-nm exhibits V _T = 0.1 V, g_m,max = 1.75 mS/μm, f_T = 465 GHz and f_max = 1.06 THz at a moderate value of V_DS = 0.75 V. In addition, we have physically modeled the abnormal peaky behavior in Mason's unilateral gain (U_g) at high values of V_DS. A revised small signal model that includes a shunting R_gd-NDR with negative value successfully describes the behavior of the device from 1 to 67 GHz.

Original language	English
Title of host publication	2010 IEEE International Electron Devices Meeting, IEDM 2010
Pages	30.6.1-30.6.4
DOIs	https://doi.org/10.1109/IEDM.2010.5703453
State	Published - 2010
Event	2010 IEEE International Electron Devices Meeting, IEDM 2010 - San Francisco, CA, United States Duration: 6 Dec 2010 → 8 Dec 2010

Publication series

Name	Technical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)	0163-1918

Conference

Conference	2010 IEEE International Electron Devices Meeting, IEDM 2010
Country/Territory	United States
City	San Francisco, CA
Period	6/12/10 → 8/12/10

Access to Document

10.1109/IEDM.2010.5703453

Cite this

@inproceedings{66e704f4dadd4cf8a165ea7698570b61,

title = "50-nm E-mode in0.7Ga0.3As PHEMTs on 100-mm InP substrate with fmax > 1 THz",

abstract = "We have demonstrated 50-nm enhancement-mode (E-mode) In 0.7Ga0.3As PHEMTs with fmax in excess of 1 THz. The devices feature a Pt gate sinking process to effectively thin down the In0.52Al0.48As barrier layer, together with a two-step recess process. The fabricated device with Lg = 50-nm exhibits V T = 0.1 V, gm,max = 1.75 mS/μm, fT = 465 GHz and fmax = 1.06 THz at a moderate value of VDS = 0.75 V. In addition, we have physically modeled the abnormal peaky behavior in Mason's unilateral gain (Ug) at high values of VDS. A revised small signal model that includes a shunting Rgd-NDR with negative value successfully describes the behavior of the device from 1 to 67 GHz.",

author = "Kim, {Dae Hyun} and {Del Alamo}, {Jes{\'u}s A.} and Peter Chen and Wonill Ha and Miguel Urteaga and Berinder Brar",

year = "2010",

doi = "10.1109/IEDM.2010.5703453",

language = "English",

isbn = "9781424474196",

series = "Technical Digest - International Electron Devices Meeting, IEDM",

pages = "30.6.1--30.6.4",

booktitle = "2010 IEEE International Electron Devices Meeting, IEDM 2010",

note = "2010 IEEE International Electron Devices Meeting, IEDM 2010 ; Conference date: 06-12-2010 Through 08-12-2010",

}

Kim, DH, Del Alamo, JA, Chen, P, Ha, W, Urteaga, M & Brar, B 2010, 50-nm E-mode in_0.7Ga_0.3As PHEMTs on 100-mm InP substrate with f_max > 1 THz. in 2010 IEEE International Electron Devices Meeting, IEDM 2010., 5703453, Technical Digest - International Electron Devices Meeting, IEDM, pp. 30.6.1-30.6.4, 2010 IEEE International Electron Devices Meeting, IEDM 2010, San Francisco, CA, United States, 6/12/10. https://doi.org/10.1109/IEDM.2010.5703453

50-nm E-mode in_0.7Ga_0.3As PHEMTs on 100-mm InP substrate with f_max > 1 THz. / Kim, Dae Hyun; Del Alamo, Jesús A.; Chen, Peter et al.
2010 IEEE International Electron Devices Meeting, IEDM 2010. 2010. p. 30.6.1-30.6.4 5703453 (Technical Digest - International Electron Devices Meeting, IEDM).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Ha, Wonill

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N2 - We have demonstrated 50-nm enhancement-mode (E-mode) In 0.7Ga0.3As PHEMTs with fmax in excess of 1 THz. The devices feature a Pt gate sinking process to effectively thin down the In0.52Al0.48As barrier layer, together with a two-step recess process. The fabricated device with Lg = 50-nm exhibits V T = 0.1 V, gm,max = 1.75 mS/μm, fT = 465 GHz and fmax = 1.06 THz at a moderate value of VDS = 0.75 V. In addition, we have physically modeled the abnormal peaky behavior in Mason's unilateral gain (Ug) at high values of VDS. A revised small signal model that includes a shunting Rgd-NDR with negative value successfully describes the behavior of the device from 1 to 67 GHz.

AB - We have demonstrated 50-nm enhancement-mode (E-mode) In 0.7Ga0.3As PHEMTs with fmax in excess of 1 THz. The devices feature a Pt gate sinking process to effectively thin down the In0.52Al0.48As barrier layer, together with a two-step recess process. The fabricated device with Lg = 50-nm exhibits V T = 0.1 V, gm,max = 1.75 mS/μm, fT = 465 GHz and fmax = 1.06 THz at a moderate value of VDS = 0.75 V. In addition, we have physically modeled the abnormal peaky behavior in Mason's unilateral gain (Ug) at high values of VDS. A revised small signal model that includes a shunting Rgd-NDR with negative value successfully describes the behavior of the device from 1 to 67 GHz.

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