8K-point pipelined FFT/IFFT with compact memory for DVB-T using block floating-point scaling technique

Hui Gon Kim, Ki Tae Yoon, Jin Sun Youn, Jun Rim Choi

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

We Propose a 2K/4K/8K point FFT (Fast Fourier Transform) for OFDM (Orthogonal Frequency Division Multiplexing) of DVB-H (Digital Video Broadcast Terrestrial) Receiver. The proposed FFT architecture utilizes cascaded radix-4 single path feedback (SDF) structure based on the Radix-2/Radix-4 FFT algorithm.[ll] We use block floating point scaling technique in order to increase SQNR The 2K/8K FFT consists of 5 cascaded stages of radix-4 and 3 stages of radix-2 butterfly units. The SQNR of 58dB is achieved with 10-bit data input, 14-bit internal data and twiddle factors, and 18-bit data output. The core has 75,804 gates with 204,672 bits of RAM and 33,572 bits of ROM using 0.18um CMOS technology

Original languageEnglish
Title of host publication2009 4th International Symposium on Wireless and Pervasive Computing, ISWPC 2009
DOIs
StatePublished - 2009
Event2009 4th International Symposium on Wireless and Pervasive Computing, ISWPC 2009 - Melbourne, VIC, Australia
Duration: 11 Feb 200913 Feb 2009

Publication series

Name2009 4th International Symposium on Wireless and Pervasive Computing, ISWPC 2009

Conference

Conference2009 4th International Symposium on Wireless and Pervasive Computing, ISWPC 2009
Country/TerritoryAustralia
CityMelbourne, VIC
Period11/02/0913/02/09

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