8K-point pipelined FFT/IFFT with compact memory for DVB-T using block floating-point scaling technique

Hui Gon Kim; Jin Soen Youn; Ki Tae Yoon; Jun Rim Choi

doi:10.1109/ITICT.2007.4475614

8K-point pipelined FFT/IFFT with compact memory for DVB-T using block floating-point scaling technique

Hui Gon Kim, Jin Soen Youn, Ki Tae Yoon, Jun Rim Choi

School of Electronics Engineering

Kyungpook National University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

We Propose a 2K/8K point FFT (Fast Fourier Transform) for OFDM (Orthogonal Frequency Division Multiplexing) of DVB-T (Digital Video Broadcast Terrestrial) Receiver. The proposed FFT architecture utilizes cascaded radix-4 Single Path Feedback (SDF) structure based on the Radix-2/Radix-4 FFT algorithm. [11] We use block floating point scaling technique in order to increase SQNJR. The 2K/8K FFT consists of 5 cascaded stages of radix-4 and 3 stages of radix-2 butterfly units. The SQNR of 58dB is achieved with 10-bit data input, 14-bit internal data and twiddle factors, and 18-bit data output. The core has 91,800 gates with 184,284 bits of Ram and 33,572 bits of ROM using 0.18um CMOS technology.

Original language	English
Title of host publication	2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007
Pages	41-44
Number of pages	4
DOIs	https://doi.org/10.1109/ITICT.2007.4475614
State	Published - 2007
Event	2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007 - Cairo, Egypt Duration: 16 Dec 2007 → 18 Dec 2007

Publication series

Name	2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007

Conference

Conference	2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007
Country/Territory	Egypt
City	Cairo
Period	16/12/07 → 18/12/07

Keywords

Block floating point
Digital video broadcast territorial
Orthogonal frequency division modulation
Single delay feedback

Access to Document

10.1109/ITICT.2007.4475614

Cite this

Kim, H. G., Youn, J. S., Yoon, K. T., & Choi, J. R. (2007). 8K-point pipelined FFT/IFFT with compact memory for DVB-T using block floating-point scaling technique. In 2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007 (pp. 41-44). Article 4475614 (2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007). https://doi.org/10.1109/ITICT.2007.4475614

@inproceedings{93b9cb1ccace4566bb06e1212f0b77e4,

title = "8K-point pipelined FFT/IFFT with compact memory for DVB-T using block floating-point scaling technique",

abstract = "We Propose a 2K/8K point FFT (Fast Fourier Transform) for OFDM (Orthogonal Frequency Division Multiplexing) of DVB-T (Digital Video Broadcast Terrestrial) Receiver. The proposed FFT architecture utilizes cascaded radix-4 Single Path Feedback (SDF) structure based on the Radix-2/Radix-4 FFT algorithm. [11] We use block floating point scaling technique in order to increase SQNJR. The 2K/8K FFT consists of 5 cascaded stages of radix-4 and 3 stages of radix-2 butterfly units. The SQNR of 58dB is achieved with 10-bit data input, 14-bit internal data and twiddle factors, and 18-bit data output. The core has 91,800 gates with 184,284 bits of Ram and 33,572 bits of ROM using 0.18um CMOS technology.",

keywords = "Block floating point, Digital video broadcast territorial, Orthogonal frequency division modulation, Single delay feedback",

author = "Kim, {Hui Gon} and Youn, {Jin Soen} and Yoon, {Ki Tae} and Choi, {Jun Rim}",

year = "2007",

doi = "10.1109/ITICT.2007.4475614",

language = "English",

isbn = "142441430X",

series = "2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007",

pages = "41--44",

booktitle = "2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007",

note = "2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007 ; Conference date: 16-12-2007 Through 18-12-2007",

}

Kim, HG, Youn, JS, Yoon, KT & Choi, JR 2007, 8K-point pipelined FFT/IFFT with compact memory for DVB-T using block floating-point scaling technique. in 2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007., 4475614, 2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007, pp. 41-44, 2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007, Cairo, Egypt, 16/12/07. https://doi.org/10.1109/ITICT.2007.4475614

8K-point pipelined FFT/IFFT with compact memory for DVB-T using block floating-point scaling technique. / Kim, Hui Gon; Youn, Jin Soen; Yoon, Ki Tae et al.
2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007. 2007. p. 41-44 4475614 (2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - 8K-point pipelined FFT/IFFT with compact memory for DVB-T using block floating-point scaling technique

AU - Kim, Hui Gon

AU - Youn, Jin Soen

AU - Yoon, Ki Tae

AU - Choi, Jun Rim

PY - 2007

Y1 - 2007

N2 - We Propose a 2K/8K point FFT (Fast Fourier Transform) for OFDM (Orthogonal Frequency Division Multiplexing) of DVB-T (Digital Video Broadcast Terrestrial) Receiver. The proposed FFT architecture utilizes cascaded radix-4 Single Path Feedback (SDF) structure based on the Radix-2/Radix-4 FFT algorithm. [11] We use block floating point scaling technique in order to increase SQNJR. The 2K/8K FFT consists of 5 cascaded stages of radix-4 and 3 stages of radix-2 butterfly units. The SQNR of 58dB is achieved with 10-bit data input, 14-bit internal data and twiddle factors, and 18-bit data output. The core has 91,800 gates with 184,284 bits of Ram and 33,572 bits of ROM using 0.18um CMOS technology.

AB - We Propose a 2K/8K point FFT (Fast Fourier Transform) for OFDM (Orthogonal Frequency Division Multiplexing) of DVB-T (Digital Video Broadcast Terrestrial) Receiver. The proposed FFT architecture utilizes cascaded radix-4 Single Path Feedback (SDF) structure based on the Radix-2/Radix-4 FFT algorithm. [11] We use block floating point scaling technique in order to increase SQNJR. The 2K/8K FFT consists of 5 cascaded stages of radix-4 and 3 stages of radix-2 butterfly units. The SQNR of 58dB is achieved with 10-bit data input, 14-bit internal data and twiddle factors, and 18-bit data output. The core has 91,800 gates with 184,284 bits of Ram and 33,572 bits of ROM using 0.18um CMOS technology.

KW - Block floating point

KW - Digital video broadcast territorial

KW - Orthogonal frequency division modulation

KW - Single delay feedback

UR - http://www.scopus.com/inward/record.url?scp=49749145325&partnerID=8YFLogxK

U2 - 10.1109/ITICT.2007.4475614

DO - 10.1109/ITICT.2007.4475614

M3 - Conference contribution

AN - SCOPUS:49749145325

SN - 142441430X

SN - 9781424414307

T3 - 2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007

SP - 41

EP - 44

BT - 2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007

T2 - 2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007

Y2 - 16 December 2007 through 18 December 2007

ER -

Kim HG, Youn JS, Yoon KT, Choi JR. 8K-point pipelined FFT/IFFT with compact memory for DVB-T using block floating-point scaling technique. In 2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007. 2007. p. 41-44. 4475614. (2007 ITI 5th International Conference on Information and Communications Technology, ICICT 2007). doi: 10.1109/ITICT.2007.4475614

8K-point pipelined FFT/IFFT with compact memory for DVB-T using block floating-point scaling technique

Abstract

Publication series

Conference

Keywords

Access to Document

Other files and links

Fingerprint

Cite this