A 1-channel 3-band wide dynamic range compression chip for vibration transducer of implantable hearing aids

Dongwook Kim; Kiwoong Seong; Myoungnam Kim; Jinho Cho; Jyunghyun Lee

doi:10.3233/BME-130898

A 1-channel 3-band wide dynamic range compression chip for vibration transducer of implantable hearing aids

Dongwook Kim, Kiwoong Seong, Myoungnam Kim, Jinho Cho, Jyunghyun Lee

Department of Medicine

Kyungpook National University

Research output: Contribution to journal › Article › peer-review

6 Scopus citations

Abstract

In this paper, a digital audio processing chip which uses a wide dynamic range compression (WDRC) algorithm is designed and implemented for implantable hearing aids system. The designed chip operates at a single voltage of 3.3V and drives a 16 bit parallel input and output at 32 kHz sample. The designed chip has 1-channel 3-band WDRC composed of a FIR filter bank, a level detector, and a compression part. To verify the performance of the designed chip, we measured the frequency separations of bands and compression gain control to reflect the hearing threshold level.

Original language	English
Pages (from-to)	1009-1017
Number of pages	9
Journal	Bio-Medical Materials and Engineering
Volume	24
Issue number	1
DOIs	https://doi.org/10.3233/BME-130898
State	Published - 2014

Keywords

application specific integrated circuit
fitting formula
implantable hearing aids
vibration transducer
wide dynamic range compression

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.3233/BME-130898

Cite this

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abstract = "In this paper, a digital audio processing chip which uses a wide dynamic range compression (WDRC) algorithm is designed and implemented for implantable hearing aids system. The designed chip operates at a single voltage of 3.3V and drives a 16 bit parallel input and output at 32 kHz sample. The designed chip has 1-channel 3-band WDRC composed of a FIR filter bank, a level detector, and a compression part. To verify the performance of the designed chip, we measured the frequency separations of bands and compression gain control to reflect the hearing threshold level.",

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AU - Seong, Kiwoong

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AU - Cho, Jinho

AU - Lee, Jyunghyun

PY - 2014

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N2 - In this paper, a digital audio processing chip which uses a wide dynamic range compression (WDRC) algorithm is designed and implemented for implantable hearing aids system. The designed chip operates at a single voltage of 3.3V and drives a 16 bit parallel input and output at 32 kHz sample. The designed chip has 1-channel 3-band WDRC composed of a FIR filter bank, a level detector, and a compression part. To verify the performance of the designed chip, we measured the frequency separations of bands and compression gain control to reflect the hearing threshold level.

AB - In this paper, a digital audio processing chip which uses a wide dynamic range compression (WDRC) algorithm is designed and implemented for implantable hearing aids system. The designed chip operates at a single voltage of 3.3V and drives a 16 bit parallel input and output at 32 kHz sample. The designed chip has 1-channel 3-band WDRC composed of a FIR filter bank, a level detector, and a compression part. To verify the performance of the designed chip, we measured the frequency separations of bands and compression gain control to reflect the hearing threshold level.

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KW - fitting formula

KW - implantable hearing aids

KW - vibration transducer

KW - wide dynamic range compression

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ER -

A 1-channel 3-band wide dynamic range compression chip for vibration transducer of implantable hearing aids

Abstract

Keywords

UN SDGs

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