Abstract
In this paper, a digital audio processing chip which uses a wide dynamic range compression (WDRC) algorithm is designed and implemented for implantable hearing aids system. The designed chip operates at a single voltage of 3.3V and drives a 16 bit parallel input and output at 32 kHz sample. The designed chip has 1-channel 3-band WDRC composed of a FIR filter bank, a level detector, and a compression part. To verify the performance of the designed chip, we measured the frequency separations of bands and compression gain control to reflect the hearing threshold level.
| Original language | English |
|---|---|
| Pages (from-to) | 1009-1017 |
| Number of pages | 9 |
| Journal | Bio-Medical Materials and Engineering |
| Volume | 24 |
| Issue number | 1 |
| DOIs | |
| State | Published - 2014 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 3 Good Health and Well-being
Keywords
- application specific integrated circuit
- fitting formula
- implantable hearing aids
- vibration transducer
- wide dynamic range compression
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