@inproceedings{f2b55c78fbf34cd3a6b585cc44d37c14,
title = "A 112-GS/s 1-to-4 ADC front-end with more than 35-dBc SFDR and 28-dB SNDR up to 43-GHz in 130-nm SiGe BiCMOS",
abstract = "A 112 GS/s 1-to-4 ADC front-end in IHP 130 nm SiGe BiCMOS based on charge sampling is presented. In experimental tests, the ADC front-end achieves more than 35 dBc SFDR and more than 28 dB SNDR up to 43 GHz. Furthermore, sampling of 100 Gbaud (=200 Gb/s) PAM-4 signals with an EVM of 11.3\% for 400k received symbols is demonstrated.",
keywords = "Charge sampling, analog-to-digital converter (ADC), pulse amplitude modulation (PAM)",
author = "Du, \{X. Q.\} and M. Grozing and A. Uhl and S. Park and F. Buchali and K. Schuh and Le, \{S. T.\} and M. Berroth",
note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 2019 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2019 ; Conference date: 02-06-2019 Through 04-06-2019",
year = "2019",
month = jun,
doi = "10.1109/RFIC.2019.8701786",
language = "English",
series = "Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "215--218",
booktitle = "2019 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2019",
address = "United States",
}