A 67mW D-band FMCW I/Q Radar Receiver with an N-path Spillover Notch Filter in 28nm CMOS

Anirudh Kankuppe, Sehoon Park, Kristof Vaesen, Dae Woong Park, Barend Van Liempd, Piet Wambacq, Jan Craninckx

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

A 139.5-157.7 GHz D-band I/Q radar receiver with an on-chip antenna and a spillover resilient N-path baseband filter is presented. Spillover and its manifestation based on the chirp rate is discussed and a filter for spillover mitigation is implemented. The radar is characterized with 55 dB conversion gain, 8dB NF (5.6 dB EINF) and 26dB narrow-band spillover attenuation. The receiver is also capable of selectively mitigating very closeby large reflectors and the system power consumption is 67mW.

Original languageEnglish
Title of host publicationESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference, Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages471-474
Number of pages4
ISBN (Electronic)9781665437479
DOIs
StatePublished - 13 Sep 2021
Event47th IEEE European Solid State Circuits Conference, ESSCIRC 2021 - Virtual, Online, France
Duration: 6 Sep 20219 Sep 2021

Publication series

NameESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference, Proceedings

Conference

Conference47th IEEE European Solid State Circuits Conference, ESSCIRC 2021
Country/TerritoryFrance
CityVirtual, Online
Period6/09/219/09/21

Keywords

  • D-band
  • FMCW
  • low power
  • N-path filters
  • radar receiver
  • spillover mitigation

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