Abstract
As an effort to improve the energy efficiency of switched-capacitor circuits, zero-crossingbased integrators (ZCBI) that consist of zero-crossing detectors and charging circuits have been proposed. To break the trade-off between accuracy and speed, ZCBI typically employs a two-phase charging scheme that relies on an additional threshold for zero-crossing detection. This paper proposes a simpler realization method of the two-phase charging scheme by means of charge sharing. To demonstrate feasibility of the proposed method, we designed and fabricated a second-order delta-sigma modulator in 180-nm complementary metal–oxide–semiconductor (CMOS) technology. The measurement results show that the modulator exhibits a peak signal-to-noise-and-distortion ratio (SNDR) of 46.3 dB over the bandwidth of 156 kHz with the power consumption of 684 μW. We also designed the same modulator in 65-nm CMOS technology and simulation results imply that the proposed circuit is able to achieve a much better energy efficiency in advanced technology.
| Original language | English |
|---|---|
| Article number | 821 |
| Journal | Electronics (Switzerland) |
| Volume | 8 |
| Issue number | 7 |
| DOIs | |
| State | Published - Jul 2019 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
Keywords
- Delta-sigma modulator
- Low-power design
- Switched-capacitor
- Zero-crossing-based integrator
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