A Convenient Implementation of the Ternary Logic: Using Anti-Ambipolar Transistors and PMOS Based on Printed Carbon Nanotubes

Jongbeom Kim, Yeji Kim, Hyundong Lee, Jihyeong Yun, Hyeseung Jang, Huijeen Jin, Juhee Park, Bongjun Kim, Taigon Song

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

Ternary logic is said to become the potential solution to overcome the issues we encounter in binary systems. To enlighten this potential, we propose a ternary logic based on novel Anti-ambipolar transistors (AATs) and PMOSs. Conventional AATs require a complex fabrication process, and their operation is beyond the range of typical CMOS (>5 V). However, Inkjet-printed AATs are easy to fabricate, and their operating voltage is under 2V. Thus, Inkjet-based AATs are highly-suitable to use with other printable devices. Therefore, in this paper, we propose a set of novel ternary logic based on printed AATs and carbon-nanotube PMOSs. With these AATs and PMOSs, we propose 10 novel logic gates that include a practical balanced ternary full adder (TFA). Our TFA presents a compact design that can be implemented only with 41 PMOSs and 17 AATs. Our TFA reduces transistor count by -22.6% compared to the latest TFA design. We highlight that our ternary logic cells based on AATs and PMOSs are 1) the most compact design in terms of transistor count and 2) very convenient to fabricate.

Original languageEnglish
Title of host publicationProceedings - 2022 IEEE 52nd International Symposium on Multiple-Valued Logic, ISMVL 2022
PublisherIEEE Computer Society
Pages15-20
Number of pages6
ISBN (Electronic)9781665423953
DOIs
StatePublished - 2022
Event52nd IEEE International Symposium on Multiple-Valued Logic, ISMVL 2022 - Virtual, Online, United States
Duration: 18 May 202220 May 2022

Publication series

NameProceedings of The International Symposium on Multiple-Valued Logic
Volume2022-May
ISSN (Print)0195-623X

Conference

Conference52nd IEEE International Symposium on Multiple-Valued Logic, ISMVL 2022
Country/TerritoryUnited States
CityVirtual, Online
Period18/05/2220/05/22

Keywords

  • Anti-ambipolar Transistor (AAT)
  • ternary full-adder
  • ternary logic

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