A low-power sync processor with a floating-point timer and universal edge tracer for 3DTV active shutter glasses

Daejin Park, Tag Gon Kim, Changmin Kim, Sungho Kwak

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

A low-power sync processor chip for 3DTV shutter glasses has been proposed and implemented. The proposed sync processor adopts a newly designed floating point timer to synchronize without any sync reception and an edge tracer for universal sync-packet detection without running the CPU. The floating-point timer allows the input wireless sensor to be turned off, and the edge tracer enables the CPU to hibernate most of the time to reduce the current. The implemented chip uses less than about 25% of the operating current that major commercial shutter glasses use.

Original languageEnglish
Title of host publicationIEEE Symposium on Low-Power and High-Speed Chips - 2011 IEEE COOL Chips XIV, Proceedings
DOIs
StatePublished - 2011
Event14th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XIV - Yokohama, Japan
Duration: 20 Apr 201122 Apr 2011

Publication series

NameIEEE Symposium on Low-Power and High-Speed Chips - 2011 IEEE COOL Chips XIV, Proceedings

Conference

Conference14th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XIV
Country/TerritoryJapan
CityYokohama
Period20/04/1122/04/11

Keywords

  • fractional order circuits
  • independently clocked system
  • low power design
  • stereoscopic vision
  • systems

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