A <inline-formula> <tex-math notation="LaTeX">$V$</tex-math> </inline-formula>-Band Differential Push&#x2013;Push Frequency Doubler With a Current-Reuse gm-Boosted Buffer

In this letter, a <inline-formula> <tex-math notation="LaTeX">$V$</tex-math> </inline-formula>-band differential push&#x2013;push frequency doubler with a current-reuse gm-boosted buffer fabricated in a 65-nm bulk complementary metal oxide semiconductor (CMOS) process is presented. A differential hybrid coupler converts balanced input signals into quadrature signals at <inline-formula> <tex-math notation="LaTeX">$f_{0}$</tex-math> </inline-formula>, which are then converted to 2<inline-formula> <tex-math notation="LaTeX">$f_{0}$</tex-math> </inline-formula> by subsequent push-push frequency doublers. Given the provision of 2<inline-formula> <tex-math notation="LaTeX">$f_{0}$</tex-math> </inline-formula> at the differential outputs, the output power is doubled. The doubler is also designed to provide a high gain at 2<inline-formula> <tex-math notation="LaTeX">$f_{0}$</tex-math> </inline-formula> via a current-reuse gm-boosting buffer through cross-coupled capacitors. It achieves a 3-dB bandwidth from 56.2 to 64.8 GHz. The maximum conversion gain (CG) and output power are 9.1 dB and 5.6 dBm, respectively, at an input frequency of 30 GHz. The chip area including the pads is 0.62 mm<inline-formula> <tex-math notation="LaTeX">$^{2}$</tex-math> </inline-formula> and the measured overall power consumption is 35.6 mW.