A novel fabrication of TDMOSFETs using two-step trench etching and twice self-alignment technique

Jongdae Kim; Jimin Oh; Sang Gi Kim; Yilsuk Yang

doi:10.1080/21681724.2018.1540059

A novel fabrication of TDMOSFETs using two-step trench etching and twice self-alignment technique

Jongdae Kim
, Jimin Oh
, Sang Gi Kim
, Yilsuk Yang

Department of Smart Mobility Engineering

Electronics and Telecommunications Research Institute

Research output: Contribution to journal › Article › peer-review

Abstract

A new fabrication method employing two-step trench etching and twice self-alignment technique was developed to obtain high cell density trench power MOSFETs by using only three mask steps. This method was implemented to increase cell density, to decrease on-resistance and to improve leakage current characteristics. The trench DMOSFETs with 1.6 μm cell pitch and 140 Mcell/in² cell density were fabricated. The specific on-resistance of the device is about 0.48 mΩ˖cm² with the breakdown voltage of 43 V.

Original language	English
Pages (from-to)	473-482
Number of pages	10
Journal	International Journal of Electronics Letters
Volume	7
Issue number	4
DOIs	https://doi.org/10.1080/21681724.2018.1540059
State	Published - 2 Oct 2019

Keywords

Atomic migration
specific on-resistance
TDMOSFET
twice self-alignment
two-step trench etching

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10.1080/21681724.2018.1540059

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title = "A novel fabrication of TDMOSFETs using two-step trench etching and twice self-alignment technique",

abstract = "A new fabrication method employing two-step trench etching and twice self-alignment technique was developed to obtain high cell density trench power MOSFETs by using only three mask steps. This method was implemented to increase cell density, to decrease on-resistance and to improve leakage current characteristics. The trench DMOSFETs with 1.6 μm cell pitch and 140 Mcell/in2 cell density were fabricated. The specific on-resistance of the device is about 0.48 mΩ˖cm2 with the breakdown voltage of 43 V.",

keywords = "Atomic migration, specific on-resistance, TDMOSFET, twice self-alignment, two-step trench etching",

author = "Jongdae Kim and Jimin Oh and Kim, \{Sang Gi\} and Yilsuk Yang",

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doi = "10.1080/21681724.2018.1540059",

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T1 - A novel fabrication of TDMOSFETs using two-step trench etching and twice self-alignment technique

AU - Kim, Jongdae

AU - Oh, Jimin

AU - Kim, Sang Gi

AU - Yang, Yilsuk

PY - 2019/10/2

Y1 - 2019/10/2

N2 - A new fabrication method employing two-step trench etching and twice self-alignment technique was developed to obtain high cell density trench power MOSFETs by using only three mask steps. This method was implemented to increase cell density, to decrease on-resistance and to improve leakage current characteristics. The trench DMOSFETs with 1.6 μm cell pitch and 140 Mcell/in2 cell density were fabricated. The specific on-resistance of the device is about 0.48 mΩ˖cm2 with the breakdown voltage of 43 V.

AB - A new fabrication method employing two-step trench etching and twice self-alignment technique was developed to obtain high cell density trench power MOSFETs by using only three mask steps. This method was implemented to increase cell density, to decrease on-resistance and to improve leakage current characteristics. The trench DMOSFETs with 1.6 μm cell pitch and 140 Mcell/in2 cell density were fabricated. The specific on-resistance of the device is about 0.48 mΩ˖cm2 with the breakdown voltage of 43 V.

KW - Atomic migration

KW - specific on-resistance

KW - TDMOSFET

KW - twice self-alignment

KW - two-step trench etching

UR - https://www.scopus.com/pages/publications/85057553046

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DO - 10.1080/21681724.2018.1540059

M3 - Article

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SN - 2168-1724

VL - 7

SP - 473

EP - 482

JO - International Journal of Electronics Letters

JF - International Journal of Electronics Letters

IS - 4

ER -

A novel fabrication of TDMOSFETs using two-step trench etching and twice self-alignment technique

Abstract

Keywords

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