@inproceedings{deb8d4a1762d4ca990a7193670a06626,
title = "A Novel Processing Unit and Architecture for Process-In Memory (PIM) in NAND Flash Memory",
abstract = "Process-in Memory (PIM) is a scheme to enhance the processing speed in artificial intelligence (AI) by reducing the data bottle neck that occurs between the processor and memory. Typical PIM schemes focus on developing optimal paths between CPU and SRAM/DRAM. However, SRAM/DRAM based PIM may not be the optimal solution for cases where the data size for processing can easily be beyond the capacity of SRAM/DRAM. Thus, we propose a PIM scheme for NAND flash memory that shares the cache register. Our scheme significantly reduces the data transfer inside the memory hierarchy and reduces the runtime by -41.6% compared to DRAM PIM scheme. Compared to NAND flash scheme, we reduce the runtime by -34.6%",
keywords = "Local core, NAND Flash, Processing-in Memory",
author = "Kim, {Hyun Woo} and Seungwon Baek and Jaehong Song and Taigon Song",
note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 19th International System-on-Chip Design Conference, ISOCC 2022 ; Conference date: 19-10-2022 Through 22-10-2022",
year = "2022",
doi = "10.1109/ISOCC56007.2022.10031375",
language = "English",
series = "Proceedings - International SoC Design Conference 2022, ISOCC 2022",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "127--128",
booktitle = "Proceedings - International SoC Design Conference 2022, ISOCC 2022",
address = "United States",
}