A Power-Efficient Reconfigurable Hybrid CNN-SNN Accelerator for High Performance AI Applications

Heuijee Yun, Daejin Park

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Deep learning-based object detection requires high computation, making real-time processing difficult due to excessive power consumption and irregular workloads in conventional accelerators. Event-driven hybrid model training has been explored as a method to reduce power consumption. However, its implementation on traditional hardware remains challenging due to the lack of efficient sparse computation optimization. To address this issue, this paper proposes a power-efficient CNNSNN hybrid accelerator that leverages event-driven spiking computation and adaptive reconfiguration. Unlike conventional CNN accelerators that rely on continuous activation functions and fixed processing pipelines, the proposed architecture selectively converts energy-intensive layers into SNNs. This hybrid approach minimizes power-hungry multiply-accumulate operations by leveraging sparse, event-driven spike processing. The accelerator uses a reconfigurable dual-lane processor that switches between CNN and SNN operations for efficient workload distribution. To efficiently manage the dynamic switching between CNN and SNN operations, the accelerator employs adaptive dynamic memory optimization to minimize data movement overhead, while multistage pipeline optimizes temporal accumulation to maximize the benefits of event-driven SNN processing. The proposed hybrid CNN-SNN accelerator reduces power consumption by 32 % while maintaining 97.5% accuracy, improving FPS per watt by 47-67% over conventional CNN architectures. Its dynamic workload adaptation increases inference speed by up to 16 %, making it highly efficient for real-time edge AI.

Original languageEnglish
Title of host publicationIEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2025 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798331534844
DOIs
StatePublished - 2025
Event28th IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2025 - Tokyo, Japan
Duration: 16 Apr 202518 Apr 2025

Publication series

NameIEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2025 - Proceedings

Conference

Conference28th IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2025
Country/TerritoryJapan
CityTokyo
Period16/04/2518/04/25

Keywords

  • Event-driven processing
  • Hybrid CNN/SNN accelerator
  • Low-power deep learning
  • Reconfigurable computing

Fingerprint

Dive into the research topics of 'A Power-Efficient Reconfigurable Hybrid CNN-SNN Accelerator for High Performance AI Applications'. Together they form a unique fingerprint.

Cite this