A Smith-Waterman Hardware Accelerator Design using Sliding Window for Genomic Sequence Alignment

Junhyuk Baik; Donghui Lee; Yongtae Kim

doi:10.1109/ISOCC59558.2023.10396043

A Smith-Waterman Hardware Accelerator Design using Sliding Window for Genomic Sequence Alignment

Junhyuk Baik, Donghui Lee, Yongtae Kim

Kyungpook National University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

This paper presents a hardware accelerator based on the Smith-Waterman algorithm, a well-known sequence alignment technique in bioinformatics. The proposed accelerator enhances its hardware efficiency significantly by employing a sliding window technique under a linear systolic array structure. The multiple processing element (PE) in the array allows parallel computations of the alignment, improving hardware resource utilization. When implemented in a 32-nm CMOS technology, the proposed Smith-Waterman hardware design enhances the area, delay, power, and energy by 80.6%, 52.9%, 67.4%, and 84.6%, respectively, versus the traditional counterpart without the sliding window scheme.

Original language	English
Title of host publication	Proceedings - International SoC Design Conference 2023, ISOCC 2023
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1-2
Number of pages	2
ISBN (Electronic)	9798350327038
DOIs	https://doi.org/10.1109/ISOCC59558.2023.10396043
State	Published - 2023
Event	20th International SoC Design Conference, ISOCC 2023 - Jeju, Korea, Republic of Duration: 25 Oct 2023 → 28 Oct 2023

Publication series

Name	Proceedings - International SoC Design Conference 2023, ISOCC 2023

Conference

Conference	20th International SoC Design Conference, ISOCC 2023
Country/Territory	Korea, Republic of
City	Jeju
Period	25/10/23 → 28/10/23

Keywords

hardware accelerator
processing element
sequence alignment
sliding window
Smith-Waterman algorithm
systolic array

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10.1109/ISOCC59558.2023.10396043

Cite this

Baik, J., Lee, D., & Kim, Y. (2023). A Smith-Waterman Hardware Accelerator Design using Sliding Window for Genomic Sequence Alignment. In Proceedings - International SoC Design Conference 2023, ISOCC 2023 (pp. 1-2). (Proceedings - International SoC Design Conference 2023, ISOCC 2023). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISOCC59558.2023.10396043

@inproceedings{d9d7f52ccda543fc87b6a526d29c4453,

title = "A Smith-Waterman Hardware Accelerator Design using Sliding Window for Genomic Sequence Alignment",

abstract = "This paper presents a hardware accelerator based on the Smith-Waterman algorithm, a well-known sequence alignment technique in bioinformatics. The proposed accelerator enhances its hardware efficiency significantly by employing a sliding window technique under a linear systolic array structure. The multiple processing element (PE) in the array allows parallel computations of the alignment, improving hardware resource utilization. When implemented in a 32-nm CMOS technology, the proposed Smith-Waterman hardware design enhances the area, delay, power, and energy by 80.6%, 52.9%, 67.4%, and 84.6%, respectively, versus the traditional counterpart without the sliding window scheme.",

keywords = "hardware accelerator, processing element, sequence alignment, sliding window, Smith-Waterman algorithm, systolic array",

author = "Junhyuk Baik and Donghui Lee and Yongtae Kim",

note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 20th International SoC Design Conference, ISOCC 2023 ; Conference date: 25-10-2023 Through 28-10-2023",

year = "2023",

doi = "10.1109/ISOCC59558.2023.10396043",

language = "English",

series = "Proceedings - International SoC Design Conference 2023, ISOCC 2023",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "1--2",

booktitle = "Proceedings - International SoC Design Conference 2023, ISOCC 2023",

address = "United States",

}

Baik, J, Lee, D & Kim, Y 2023, A Smith-Waterman Hardware Accelerator Design using Sliding Window for Genomic Sequence Alignment. in Proceedings - International SoC Design Conference 2023, ISOCC 2023. Proceedings - International SoC Design Conference 2023, ISOCC 2023, Institute of Electrical and Electronics Engineers Inc., pp. 1-2, 20th International SoC Design Conference, ISOCC 2023, Jeju, Korea, Republic of, 25/10/23. https://doi.org/10.1109/ISOCC59558.2023.10396043

A Smith-Waterman Hardware Accelerator Design using Sliding Window for Genomic Sequence Alignment. / Baik, Junhyuk; Lee, Donghui; Kim, Yongtae.
Proceedings - International SoC Design Conference 2023, ISOCC 2023. Institute of Electrical and Electronics Engineers Inc., 2023. p. 1-2 (Proceedings - International SoC Design Conference 2023, ISOCC 2023).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A Smith-Waterman Hardware Accelerator Design using Sliding Window for Genomic Sequence Alignment

AU - Baik, Junhyuk

AU - Lee, Donghui

AU - Kim, Yongtae

PY - 2023

Y1 - 2023

N2 - This paper presents a hardware accelerator based on the Smith-Waterman algorithm, a well-known sequence alignment technique in bioinformatics. The proposed accelerator enhances its hardware efficiency significantly by employing a sliding window technique under a linear systolic array structure. The multiple processing element (PE) in the array allows parallel computations of the alignment, improving hardware resource utilization. When implemented in a 32-nm CMOS technology, the proposed Smith-Waterman hardware design enhances the area, delay, power, and energy by 80.6%, 52.9%, 67.4%, and 84.6%, respectively, versus the traditional counterpart without the sliding window scheme.

AB - This paper presents a hardware accelerator based on the Smith-Waterman algorithm, a well-known sequence alignment technique in bioinformatics. The proposed accelerator enhances its hardware efficiency significantly by employing a sliding window technique under a linear systolic array structure. The multiple processing element (PE) in the array allows parallel computations of the alignment, improving hardware resource utilization. When implemented in a 32-nm CMOS technology, the proposed Smith-Waterman hardware design enhances the area, delay, power, and energy by 80.6%, 52.9%, 67.4%, and 84.6%, respectively, versus the traditional counterpart without the sliding window scheme.

KW - hardware accelerator

KW - processing element

KW - sequence alignment

KW - sliding window

KW - Smith-Waterman algorithm

KW - systolic array

UR - http://www.scopus.com/inward/record.url?scp=85184808703&partnerID=8YFLogxK

U2 - 10.1109/ISOCC59558.2023.10396043

DO - 10.1109/ISOCC59558.2023.10396043

M3 - Conference contribution

AN - SCOPUS:85184808703

T3 - Proceedings - International SoC Design Conference 2023, ISOCC 2023

SP - 1

EP - 2

BT - Proceedings - International SoC Design Conference 2023, ISOCC 2023

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 20th International SoC Design Conference, ISOCC 2023

Y2 - 25 October 2023 through 28 October 2023

ER -

A Smith-Waterman Hardware Accelerator Design using Sliding Window for Genomic Sequence Alignment

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