Abstract
This paper presents a high-voltage lateral DMOS transistor (LDMOST) model for steady-state condition.The device modelling method is basically based on a semi-numerical regional approach.The complete model is physical, so that it accounts for unique LDMOST features such as non-uniform channel doping, non-planar drift region and space-charge-limited current flowing.Themodelcalculationsshow good overall agreement withthe measured results.This DMOS transistor model, whichcan beapplicable to a SPICE-like circuit simulator, might be useful in technology CAD of high-voltage power ICs.
| Original language | English |
|---|---|
| Pages (from-to) | 94-101 |
| Number of pages | 8 |
| Journal | International Journal of Emerging Technology and Advanced Engineering |
| Volume | 12 |
| Issue number | 9 |
| DOIs | |
| State | Published - 1 Sep 2022 |
Keywords
- DMOS transistor
- high-voltage
- power MOSFET
- semiconductor device model
- steady-state