A third-order ΣΔ modulator in 0.18μm CMOS with calibrated mixed-mode integrators

Jae Hoon Shim, Beomsup Kim

Research output: Contribution to conferencePaperpeer-review

2 Scopus citations

Abstract

A third-order ΣΔ modulator employing mixed-mode integrators has been designed and implemented in 0.18um CMOS process. Because the use of mixed-mode integrators allows a 12dB improvement in the dynamic range over conventional third-order architectures, the modulator can be driven with lower sampling frequency to achieve the same dynamic range. The modulator covers the dynamic range requirements of GSM and WCDMA applications with sampling frequencies of only 3.2MHz and 40MHz, respectively. The circuit occupies 0.7mm2 silicon area.

Original languageEnglish
Pages78-81
Number of pages4
StatePublished - 2004
Event2004 Symposium on VLSI Circuits, Digest of Technical Papers, 2004 VLSI - Honolulu, HI, United States
Duration: 17 Jun 200419 Jun 2004

Conference

Conference2004 Symposium on VLSI Circuits, Digest of Technical Papers, 2004 VLSI
Country/TerritoryUnited States
CityHonolulu, HI
Period17/06/0419/06/04

Keywords

  • ΣΔ modulator
  • GSM
  • Mixed-mode integrator
  • WCDMA

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