An Accurate and Efficient Stochastic Computing Adder Exploiting Bit Shuffle Control Scheme

Donghui Lee, Junhyuk Baik, Yongtae Kim

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

Stochastic computing is an emerging computing paradigm. With the use of a simple logic gate, SC can perform arithmetic operations, resulting in a small and low-power design. In this paper, we present an SC adder with one RNG and shuffling operation to improve the accuracy of the operation results. With a 65-nm CMOS technology, the proposed SC adder improves in terms of area, power, and energy by 25.5%, 27.62%, and 23.67%, respectively compared to the conventional SC adder. Additionally, the proposed SC adder improves the MAE and MSE by 1.8 × and 3.3 ×, respectively, compared to the conventional counterpart.

Original languageEnglish
Title of host publicationProceedings - International SoC Design Conference 2022, ISOCC 2022
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages51-52
Number of pages2
ISBN (Electronic)9781665459716
DOIs
StatePublished - 2022
Event19th International System-on-Chip Design Conference, ISOCC 2022 - Gangneung-si, Korea, Republic of
Duration: 19 Oct 202222 Oct 2022

Publication series

NameProceedings - International SoC Design Conference 2022, ISOCC 2022

Conference

Conference19th International System-on-Chip Design Conference, ISOCC 2022
Country/TerritoryKorea, Republic of
CityGangneung-si
Period19/10/2222/10/22

Keywords

  • shuffle
  • stochastic adder
  • stochastic computing

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