An artifact detection scheme with CUDA-based image operations

Many image filtering techniques can be accelerated with compute unified device architecture (CUDA)-based massively parallel implementations. In this paper, we show the major issues on our acceleration techniques, and also its implementation details. We implemented various image filtering operations in our own CUDA kernel programs, and they are combined to build an artifact-detection scheme in PCB board soldering process. We designed our own computational logics on the artifact detection, and finally, the whole system figure out the potential artifact regions. Comparing with the central processing unit-based reference implementation, we show its correctness and feasibility, with much execution speed-ups.