Analysis of power distribution network in TSV-based 3D-IC

Kiyeong Kim, Woojin Lee, Jaemin Kim, Taigon Song, Joohee Kim, Jun So Pak, Joungho Kim, Hyungdong Lee, Yongkee Kwon, Kunwoo Park

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

15 Scopus citations

Abstract

To reduce simultaneous switching noise (SSN) in a PDN design of TSV-based GPU system, the impedance properties of the hierarchical PDN in the TSV-based GPU system were estimated and analyzed. The system consisted of triple-stacked TSV-based DRAMs on top of the GPU connected by TSVs, a silicon interposer, and a backside re-distribution layer (BS-RDL). A segmentation-based impedance-estimation method was used for the estimation of the total PDN impedance combining models of the on-chip PDN, the power/ground (P/G) TSV, and the coplanar P/G line in the BS-RDL. The impedance properties of the PDN were also analyzed with respect to variations in the number of P/G TSVs and P/G lines in the BS-RDL and variation of the capacitance of the on-chip decoupling capacitor embedded in the on-chip PDN.

Original languageEnglish
Title of host publication2010 IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2010
PublisherIEEE Computer Society
Pages177-180
Number of pages4
ISBN (Print)9781424468652
DOIs
StatePublished - 2010

Publication series

Name2010 IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2010

Keywords

  • Coplanar P/G line
  • Hierarchical power distribution network (PDN)
  • On-chip decoupling capacitor
  • P/G TSV
  • Segmentation method

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