Analytical model for the source resistance in advanced In_xGa_1-xAs/In_0.52Al_0.48As quantum-well high-electron-mobility transistors

(Times New Roman Font, Bold, Size 10) We present a fully analytical model for the source resistance (RS) in In_xGa_1-xAs quantum-well high-electron mobility transistors based on a three-layer TLM system. The proposed RS model in this work was derived by solving the coupled 2^nd order differential equations for each current component in a non-alloyed source drain ohmic structure with appropriate boundary conditions, requiring only six physical and geometrical parameters, such as ohmic contact resistivity (ρc), barrier tunneling resistivity (ρbarrier), sheet resistances of the cap and channel regions (Rsh_cap and Rsh_ch), side-recessed length (Lside) and gate-to-source length (Lgs). We fabricated two different TLM structures to extract each model parameter, such as cap-TLM and recessed-TLM patterns. The developed RS model in this work was in excellent agreement with the RS values measured from the two TLM devices and previously reported short-Lg HEMT devices. The model revealed that the barrier tunneling resistivity already played a critical role in reducing the value of RS in state-of-the-art HEMTs. Unless the barrier tunneling resistivity is reduced considerably, innovative engineering on the ohmic contact characteristics and the reduction on gate-to-source spacing (Lgs) would only marginally improve the device performance.