Architectural design exploration for neuromorphic processors with memristive synapses

Qian Wang, Yongtae Kim, Peng Li

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

9 Scopus citations

Abstract

Due to their nonvolatile nature, excellent scalability and high density, memristive nanodevices provide a promising solution for low-cost on-chip storage. Integrating memristor-based synaptic crossbars into digital neuromorphic processors (DNPs) may facilitate efficient realization of brain inspired computing. This paper investigates architectural design exploration of DNPs with memristive synapses by proposing two synapse readout schemes. The key design tradeoffs involving different analog-to-digital conversions and memory accessing styles are thoroughly investigated.

Original languageEnglish
Title of host publicationProceedings of the IEEE Conference on Nanotechnology
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages962-966
Number of pages5
ISBN (Electronic)9781479956227
DOIs
StatePublished - 26 Nov 2014
Event2014 14th IEEE International Conference on Nanotechnology, IEEE-NANO 2014 - Toronto, Canada
Duration: 18 Aug 201421 Aug 2014

Publication series

NameProceedings of the IEEE Conference on Nanotechnology
ISSN (Electronic)1944-9399

Conference

Conference2014 14th IEEE International Conference on Nanotechnology, IEEE-NANO 2014
Country/TerritoryCanada
CityToronto
Period18/08/1421/08/14

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