TY - GEN
T1 - Architectural design exploration for neuromorphic processors with memristive synapses
AU - Wang, Qian
AU - Kim, Yongtae
AU - Li, Peng
N1 - Publisher Copyright:
© 2014 IEEE.
PY - 2014/11/26
Y1 - 2014/11/26
N2 - Due to their nonvolatile nature, excellent scalability and high density, memristive nanodevices provide a promising solution for low-cost on-chip storage. Integrating memristor-based synaptic crossbars into digital neuromorphic processors (DNPs) may facilitate efficient realization of brain inspired computing. This paper investigates architectural design exploration of DNPs with memristive synapses by proposing two synapse readout schemes. The key design tradeoffs involving different analog-to-digital conversions and memory accessing styles are thoroughly investigated.
AB - Due to their nonvolatile nature, excellent scalability and high density, memristive nanodevices provide a promising solution for low-cost on-chip storage. Integrating memristor-based synaptic crossbars into digital neuromorphic processors (DNPs) may facilitate efficient realization of brain inspired computing. This paper investigates architectural design exploration of DNPs with memristive synapses by proposing two synapse readout schemes. The key design tradeoffs involving different analog-to-digital conversions and memory accessing styles are thoroughly investigated.
UR - http://www.scopus.com/inward/record.url?scp=84919465728&partnerID=8YFLogxK
U2 - 10.1109/NANO.2014.6967962
DO - 10.1109/NANO.2014.6967962
M3 - Conference contribution
AN - SCOPUS:84919465728
T3 - Proceedings of the IEEE Conference on Nanotechnology
SP - 962
EP - 966
BT - Proceedings of the IEEE Conference on Nanotechnology
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2014 14th IEEE International Conference on Nanotechnology, IEEE-NANO 2014
Y2 - 18 August 2014 through 21 August 2014
ER -