Asymmetrical PWM Scheme Eliminating Duty Cycle Limitation in Input-Parallel Output-Series DC-DC Converter

Dai Van Bui; Honnyong Cha; Chan Viet Nguyen

doi:10.1109/TPEL.2021.3113732

Asymmetrical PWM Scheme Eliminating Duty Cycle Limitation in Input-Parallel Output-Series DC-DC Converter

Dai Van Bui
, Honnyong Cha
, Chan Viet Nguyen

School of Energy Engineering

Kyungpook National University

Research output: Contribution to journal › Article › peer-review

31 Scopus citations

Abstract

In this letter, an asymmetrical pulsewidth modulation (PWM) scheme is proposed to solve the output voltage unbalance and voltage gain issues of the input-parallel output-series (IPOS) converter when D < 0.5. With the proposed scheme, the natural output voltages balancing and high step-up conversion ratio can be extended when D < 0.5. As a result, combined with the conventional PWM scheme, the duty cycle limitation of the IPOS converter is completely eliminated without any extra components or dedicated control. A 2-kW prototype of the IPOS converter was built and tested to verify the performance of the proposed PWM scheme.

Original language	English
Pages (from-to)	2485-2490
Number of pages	6
Journal	IEEE Transactions on Power Electronics
Volume	37
Issue number	3
DOIs	https://doi.org/10.1109/TPEL.2021.3113732
State	Published - 1 Mar 2022

Keywords

Asymmetrical pulsewidth modulation (PWM)
boost converter
dual-output
input-parallel output-series (IPOS) converter
voltage balancing

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10.1109/TPEL.2021.3113732

Cite this

@article{2c636605e1854281b7eebcafe365a96d,

title = "Asymmetrical PWM Scheme Eliminating Duty Cycle Limitation in Input-Parallel Output-Series DC-DC Converter",

abstract = "In this letter, an asymmetrical pulsewidth modulation (PWM) scheme is proposed to solve the output voltage unbalance and voltage gain issues of the input-parallel output-series (IPOS) converter when D < 0.5. With the proposed scheme, the natural output voltages balancing and high step-up conversion ratio can be extended when D < 0.5. As a result, combined with the conventional PWM scheme, the duty cycle limitation of the IPOS converter is completely eliminated without any extra components or dedicated control. A 2-kW prototype of the IPOS converter was built and tested to verify the performance of the proposed PWM scheme.",

keywords = "Asymmetrical pulsewidth modulation (PWM), boost converter, dual-output, input-parallel output-series (IPOS) converter, voltage balancing",

author = "Bui, \{Dai Van\} and Honnyong Cha and Nguyen, \{Chan Viet\}",

note = "Publisher Copyright: {\textcopyright} 1986-2012 IEEE.",

year = "2022",

month = mar,

day = "1",

doi = "10.1109/TPEL.2021.3113732",

language = "English",

volume = "37",

pages = "2485--2490",

journal = "IEEE Transactions on Power Electronics",

issn = "0885-8993",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "3",

}

TY - JOUR

T1 - Asymmetrical PWM Scheme Eliminating Duty Cycle Limitation in Input-Parallel Output-Series DC-DC Converter

AU - Bui, Dai Van

AU - Cha, Honnyong

AU - Nguyen, Chan Viet

PY - 2022/3/1

Y1 - 2022/3/1

N2 - In this letter, an asymmetrical pulsewidth modulation (PWM) scheme is proposed to solve the output voltage unbalance and voltage gain issues of the input-parallel output-series (IPOS) converter when D < 0.5. With the proposed scheme, the natural output voltages balancing and high step-up conversion ratio can be extended when D < 0.5. As a result, combined with the conventional PWM scheme, the duty cycle limitation of the IPOS converter is completely eliminated without any extra components or dedicated control. A 2-kW prototype of the IPOS converter was built and tested to verify the performance of the proposed PWM scheme.

AB - In this letter, an asymmetrical pulsewidth modulation (PWM) scheme is proposed to solve the output voltage unbalance and voltage gain issues of the input-parallel output-series (IPOS) converter when D < 0.5. With the proposed scheme, the natural output voltages balancing and high step-up conversion ratio can be extended when D < 0.5. As a result, combined with the conventional PWM scheme, the duty cycle limitation of the IPOS converter is completely eliminated without any extra components or dedicated control. A 2-kW prototype of the IPOS converter was built and tested to verify the performance of the proposed PWM scheme.

KW - Asymmetrical pulsewidth modulation (PWM)

KW - boost converter

KW - dual-output

KW - input-parallel output-series (IPOS) converter

KW - voltage balancing

UR - https://www.scopus.com/pages/publications/85115686511

U2 - 10.1109/TPEL.2021.3113732

DO - 10.1109/TPEL.2021.3113732

M3 - Article

AN - SCOPUS:85115686511

SN - 0885-8993

VL - 37

SP - 2485

EP - 2490

JO - IEEE Transactions on Power Electronics

JF - IEEE Transactions on Power Electronics

IS - 3

ER -

Asymmetrical PWM Scheme Eliminating Duty Cycle Limitation in Input-Parallel Output-Series DC-DC Converter

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