Built-in binary code inversion technique for on-chip flash memory sense amplifier with reduced read current consumption

Daejin Park, Tag Gon Kim

Research output: Contribution to journalArticlepeer-review

9 Scopus citations

Abstract

The bit-line sense amplifier (S/A) for on-chip flash memory compares cell current with reference current to identify data that are programmed. The S/A for 0 (erased) cell data consumes a large sink current, which is greater than off-current for 1 (programmed) cell data. This brief proposes a built-in write/read path based on binary inversion methods to reduce the sensing current of S/A. An original binary code is programmed into flash memory with an inverted binary code based on the proposed bit inversion techniques. The de-inversion hardware, which is implemented with small logic gates to restore original binary data, only consumes logic current instead of analog sink current in the S/A. The proposed techniques are evaluated for the DSPStone benchmark and are applied to the modified S/A for ARM Cortex-M3-based microcontroller with 128-kB on-chip flash memory based on a 0.18-um EEPROM technology. The circuit-level simulation result for the DSPStone benchmark shows that a newly implemented chip with the S/A based on the proposed technique consumes approximately less than 22% of the operating power that conventional S/A uses.

Original languageEnglish
Article number6549111
Pages (from-to)1187-1191
Number of pages5
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume22
Issue number5
DOIs
StatePublished - May 2014

Keywords

  • Bit-line sense amplifier
  • data-pattern-dependent sensing
  • flash memory
  • low dynamic power
  • read-path
  • sense circuit.

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