Abstract
This article analyzes zero-clamping possible regions of three-level inverters and investigates the selection criteria for positive, negative, and zero clamping in discontinuous pulsewidth modulation (DPWM). Based on this analysis, a carrier-based minimum-loss DPWM (MLDPWM) is proposed to minimize the switching loss of the three-level inverters. The proposed method further increases the clamping region furthermore in the vicinity of a peak current by applying the zero clamping. Consequently, the switching loss can be minimized by reducing the number of switching near the peak current, considering all ranges of power factor angles and modulation indices. The performance of the proposed method is compared with that of the conventional DPWM method in the aspect of switching loss function. Moreover, the neutral-point voltage balancing is achieved by adjusting the clamping region while maintaining the principles of proposed MLDPWM. Finally, the effectiveness of the proposed method is verified by simulation and experimental results.
| Original language | English |
|---|---|
| Pages (from-to) | 13895-13906 |
| Number of pages | 12 |
| Journal | IEEE Transactions on Power Electronics |
| Volume | 40 |
| Issue number | 9 |
| DOIs | |
| State | Published - 2025 |
Keywords
- Discontinuous pulsewidth modulation (DPWM)
- minimum loss
- neutral-point (NP) balancing
- switching loss
- three-level inverter
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