Abstract
The reset breakdown of resistive random access memory (RRAM) significantly degrades device endurance. We suppressed reset breakdown by optimizing the reset operation in an HfO2-based 1T1R RRAM device. The effective gate-to-source voltage VGSeff is reduced by increasing the RRAM resistance during the reset operation. By applying the optimum VGS, we can both guarantee a sufficient reset current and suppress reset breakdown. The experimental results confirmed improved endurance characteristics without a degraded resistance ratio.
| Original language | English |
|---|---|
| Pages (from-to) | P440-P442 |
| Journal | ECS Journal of Solid State Science and Technology |
| Volume | 6 |
| Issue number | 7 |
| DOIs | |
| State | Published - 2017 |