Design of a Vertical Cylinder GaN Junctionless FET based on its GaN-on-GaN Substrate and Electrical Performance

This study presents a comparative analysis of the vertical cylinder and fin-type junctionless field-effect transistors (JLFETs) based on GaN-on-GaN substrates using three-dimensional technical computer-aided design (3D TCAD) simulations. The on-current (I_on) values of the vertical cylinder and fin-type JLFETs are 6.45 and 5.63 kA/cm², respectively. The corresponding off-current (I_off) of the devices is calculated as 2.51 × 10⁻¹⁰ and 9.72 × 10⁻² A/cm², respectively. Furthermore, their corresponding I_on/I_off ratios are 2.57 × 10¹³ and 5.79 × 10⁴, respectively. Additionally, the I_off ratio of the devices is 2.58 × 10⁹, and the subthreshold swing (SS) is calculated as 101 and 346 mV/dec, respectively. The static resistance (R_on) and breakdown voltage (BV) represent the figure of merits of the power transistor. Herein, R_on of the vertical cylinder-type device is 0.11 µΩ·cm², which is lower than 0.62 µΩ·cm² of the vertical fin-type device, whereas their corresponding BVs are calculated as 2,400 and 2,037 V, respectively. These results show that the BV of the vertical cylinder-type device is ~17.8% higher than that of the vertical fin-type device. Therefore, the vertical cylinder-type GaN JLFET has a higher performance than the vertical fin-type GaN JLFET. Herein, we provide guidance in the designing of high-performance vertical GaN power transistors.