TY - GEN
T1 - Design of an Efficient Parallel Random Number Generator Using a Single LFSR for Stochastic Computing
AU - Lee, Donghui
AU - Seo, Hyoju
AU - Kim, Yongtae
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - This paper proposes a parallel random number generator (RNG) using a single linear feedback shift register (LFSR) to generate two distinct random numbers, achieving twice the operational speed of a traditional serial RNG. The proposed RNG generates two distinct random numbers utilizing an LFSR. When implemented in a 65-nm CMOS technology, the proposed design leads to a 15.6% improvement in area and a 14.8 % improvement in power efficiency, addressing the trade-off between accuracy and energy efficiency in stochastic computing (SC). Furthermore, the proposed design not only matches but surpasses the performance of serial SC in an edge-detection digital image processing application. Therefore, for enhanced hardware efficiency and improved accuracy, the proposed parallel RNG architecture can be effectively employed.
AB - This paper proposes a parallel random number generator (RNG) using a single linear feedback shift register (LFSR) to generate two distinct random numbers, achieving twice the operational speed of a traditional serial RNG. The proposed RNG generates two distinct random numbers utilizing an LFSR. When implemented in a 65-nm CMOS technology, the proposed design leads to a 15.6% improvement in area and a 14.8 % improvement in power efficiency, addressing the trade-off between accuracy and energy efficiency in stochastic computing (SC). Furthermore, the proposed design not only matches but surpasses the performance of serial SC in an edge-detection digital image processing application. Therefore, for enhanced hardware efficiency and improved accuracy, the proposed parallel RNG architecture can be effectively employed.
KW - linear feedback shift register (LFSR)
KW - parallel random num-ber generator (RNG)
KW - stochastic computing (SC)
UR - http://www.scopus.com/inward/record.url?scp=85189937562&partnerID=8YFLogxK
U2 - 10.1109/ICAIIC60209.2024.10463230
DO - 10.1109/ICAIIC60209.2024.10463230
M3 - Conference contribution
AN - SCOPUS:85189937562
T3 - 6th International Conference on Artificial Intelligence in Information and Communication, ICAIIC 2024
SP - 775
EP - 777
BT - 6th International Conference on Artificial Intelligence in Information and Communication, ICAIIC 2024
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 6th International Conference on Artificial Intelligence in Information and Communication, ICAIIC 2024
Y2 - 19 February 2024 through 22 February 2024
ER -
