Development of error-corrector control algorithm for automatic error detection and correction on space memory modules

This paper presents an algorithm that conducts automatic memory scrubbing operated by dedicated hardwares. The proposed algorithm is designed so that it can scrub entire memory in a given scrub period, while minimally affecting the execution of flight softwares. The scrub controller is constructed in a form of state machines, which have two execution modes - normal mode and burst mode. The deadline event generator and period tick generator are designed in a separate way to support the behavior of the scrub controller. The proposed controller is implemented in VHDL code to validate its applicability. A simple version of the controller is also applied to mass memory modules used in STSAT-3.