Abstract
The characteristics of 0.15-μm InAlAs/InGaAs pseudomorphic high-electron mobility transistors (p-HEMTs) that were fabricated using the Ne-based atomic layer etching (ALET) technology and the Ar-based conventional reactive ion etching (RIE) technology were investigated. As compared with the RIE, the ALET used a much lower plasma energy and thus produced much lower plasma-induced damages to the surface and bulk of the In0.52Al0.48As barrier and showed a much higher etch selectivity (∼70) of the InP spacer against the In0.52Al0.48As barrier. The 0.15-μm InAlAs/ InGaAs p-HEMTs that were fabricated using the ALET exhibited improved GM,max (1.38 S/mm), ION/IOFF(1.18 × 104), drain-induced barrier lowering (80 mV/V), threshold voltage uniformity (Vth,avg = -190 mV and σ = 15 mV), and fT (233 GHz), mainly due to the extremely low plasma-induced damage in the Schottky gate area.
Original language | English |
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Pages (from-to) | 1086-1088 |
Number of pages | 3 |
Journal | IEEE Electron Device Letters |
Volume | 28 |
Issue number | 12 |
DOIs | |
State | Published - Dec 2007 |
Keywords
- Atomic layer deposition
- Atomic layer etching (ALET)
- Electron mobility
- HEMT circuits
- High electron mobility transistors
- I/I ratio
- Pseudomorphic high-electron mobility transistor (p-HEMT)
- Subthreshold slope
- drain-induced barrier lowering (DIBL)