Abstract
Graphene grown by chemical vapor deposition (CVD) is intrinsically polycrystalline. Since the electrical properties of graphene are degraded at grain boundaries, the performance of CVD graphene is significantly dependent upon its grain size. Thus, the evaluation of average grain size is of particular importance for the device applications of CVD graphene. However, conventional evaluation methods based on microscopic or spectroscopic measurements have limitations in accuracy due to limited inspection area and complicated processes. Here, we suggest an electrical characterization technique for precisely evaluating the average grain size of polycrystalline graphene. We found out that the sheet resistance of polycrystalline graphene is significantly dependent on device dimensions and this dependence is related to average grain size. For the evaluation of the average grain size, we synthesized CVD graphene layers with different growth conditions, fabricated transmission line model (TLM) patterns on the graphene layers, and measured the sheet resistance (RS) as a function of channel length (Lch). The average grain sizes of the CVD-graphene layers were extracted from a logistic function fitted to the measured RS–Lch curves. The results show that the average grain sizes of CVD graphene evaluated by the proposed electrical method are consistent with those evaluated from a large amount of microscopy images.
Original language | English |
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Article number | 108172 |
Journal | Solid-State Electronics |
Volume | 186 |
DOIs | |
State | Published - Dec 2021 |
Keywords
- Average grain size
- CVD graphene
- Electrical characterization
- Polycrystalline
- TLM measurement