First demonstration of a logic-process compatible junctionless ferroelectric FinFET synapse for neuromorphic applications

Myungsoo Seo, Min Ho Kang, Seung Bae Jeon, Hagyoul Bae, Jae Hur, Byung Chul Jang, Seokjung Yun, Seongwoo Cho, Wu Kang Kim, Myung Su Kim, Kyu Man Hwang, Seungbum Hong, Sung Yool Choi, Yang Kyu Choi

Research output: Contribution to journalArticlepeer-review

133 Scopus citations

Abstract

A highly scalable synapse device based on a junctionless (JL) ferroelectric (FE) FinFET is presented for neuromorphic applications. The synaptic behaviors of the JL metal-ferroelectric-insulator-silicon FinFET were experimentally demonstrated after verifying the ferroelectric characteristics of the HfZrOX (HZO) film using a metal-ferroelectric-metal capacitor. The fabricated synapse showed distinguishable polarization switching behaviors with gradually controllable channel conductance. From neural network simulations using the proposed JL FE FinFET as synapses, the pattern recognition accuracy for hand-written digits was validated to be approximately 80% for neuromorphic applications.

Original languageEnglish
Article number8402198
Pages (from-to)1445-1448
Number of pages4
JournalIEEE Electron Device Letters
Volume39
Issue number9
DOIs
StatePublished - Sep 2018

Keywords

  • FinFET
  • Junctionless FET
  • ferroelectric FET
  • neuromorphic computing system
  • synapse

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