Abstract
We report on the fabrication of low operating voltage pentacene thin film transistors with PVP (poly-4-vinylphenol)/CeO2-SiO2/PVP triple dielectric layers on a flexible substrate. Our triple dielectric layers exhibited a markedly reduced leakage current characteristic and a relatively high capacitance. The field effect mobility, on/off current ratio and subthreshold slope obtained from pentacene thin film transistors were 0.67 cm2 V s-1, 105 and 0.36 V dec-1, respectively. It was demonstrated that the spin-coating polymer layer can be used to planarize the surface irregularities and to improve the dielectric and device properties.
| Original language | English |
|---|---|
| Article number | 002 |
| Pages (from-to) | 691-694 |
| Number of pages | 4 |
| Journal | Semiconductor Science and Technology |
| Volume | 22 |
| Issue number | 7 |
| DOIs | |
| State | Published - 1 Jul 2007 |