Abstract
A low-cost, compact, high-performance clock-recovery (CR) module using a new phase-locked loop (PLL) for 40-Gb/s optical receivers is successfully designed and implemented. The newly implemented frequency detector in the PLL helps to reduce the current consumption and also extended the frequency-capture range. The implemented PLL clock-recovery module demonstrates advantages over the conventional open-loop type clock-recovery module with a DR filter by significantly improving clock jitter, thus reducing overall module cost, and allowing the possibility of providing a proper clock signal in the case of temporary loss of NRZ input signals. The CR module exhibits error-free operation during a 30-min BER test with a time-division-multiplexing (TDM) 40-Gb/s transmission system.
| Original language | English |
|---|---|
| Pages (from-to) | 312-315 |
| Number of pages | 4 |
| Journal | Microwave and Optical Technology Letters |
| Volume | 48 |
| Issue number | 2 |
| DOIs | |
| State | Published - Feb 2006 |
Keywords
- 40 Gb/s; phase-locked loop (PLL)
- Clock and data recovery (CDR)
- Clock recovery (CR)
- Jitter
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