InGaAs-based tunneling field-effect transistor with stacked dual-metal gate with PNPN structure for high performance

Ra Hee Kwon; Sang Hyuk Lee; Young Jun Yoon; Jae Hwa Seo; Young In Jang; Min Su Cho; Bo Gyeong Kim; Jung Hee Lee; In Man Kang

doi:10.5573/JSTS.2017.17.2.230

InGaAs-based tunneling field-effect transistor with stacked dual-metal gate with PNPN structure for high performance

Ra Hee Kwon, Sang Hyuk Lee, Young Jun Yoon, Jae Hwa Seo, Young In Jang, Min Su Cho, Bo Gyeong Kim, Jung Hee Lee, In Man Kang

School of Electronics Engineering

Kyungpook National University

Research output: Contribution to journal › Article › peer-review

3 Scopus citations

Abstract

We have proposed an InGaAs-based gate-all-around (GAA) tunneling field-effect transistor (TFET) with a stacked dual-metal gate (DMG). The electrical performances of the proposed TFET are evaluated through technology computer-aided design (TCAD) simulations. The simulation results show that the proposed TFET demonstrates improved DC performances including high on-state current (I_on) and steep subthreshold swing (S), in comparison with a single-metal gate (SMG) TFET with higher gate metal workfunction, as it has a thinner source-channel tunneling barrier width by low workfunction of source-side channel gate. The effects of the gate workfunction on I_on, the off-state current (I_off), and S in the DMG-TFETs are examined. The DMG-TFETs with PNPN structure demonstrate outstanding DC performances and RF characteristics with a higher n-type doping concentration in the In_0.8Ga_0.2As source-side channel region.

Original language	English
Pages (from-to)	230-238
Number of pages	9
Journal	Journal of Semiconductor Technology and Science
Volume	17
Issue number	2
DOIs	https://doi.org/10.5573/JSTS.2017.17.2.230
State	Published - Apr 2017

Keywords

Band-to-band tunneling (BTBT)
Dual-metal gate
InGaAs
PNPN
Tunneling field-effect transistors (TFETs)

Access to Document

10.5573/JSTS.2017.17.2.230

Cite this

@article{eb48eb64f5ef4b57a8d97bd3efff16be,

title = "InGaAs-based tunneling field-effect transistor with stacked dual-metal gate with PNPN structure for high performance",

abstract = "We have proposed an InGaAs-based gate-all-around (GAA) tunneling field-effect transistor (TFET) with a stacked dual-metal gate (DMG). The electrical performances of the proposed TFET are evaluated through technology computer-aided design (TCAD) simulations. The simulation results show that the proposed TFET demonstrates improved DC performances including high on-state current (Ion) and steep subthreshold swing (S), in comparison with a single-metal gate (SMG) TFET with higher gate metal workfunction, as it has a thinner source-channel tunneling barrier width by low workfunction of source-side channel gate. The effects of the gate workfunction on Ion, the off-state current (Ioff), and S in the DMG-TFETs are examined. The DMG-TFETs with PNPN structure demonstrate outstanding DC performances and RF characteristics with a higher n-type doping concentration in the In0.8Ga0.2As source-side channel region.",

keywords = "Band-to-band tunneling (BTBT), Dual-metal gate, InGaAs, PNPN, Tunneling field-effect transistors (TFETs)",

author = "Kwon, {Ra Hee} and Lee, {Sang Hyuk} and Yoon, {Young Jun} and Seo, {Jae Hwa} and Jang, {Young In} and Cho, {Min Su} and Kim, {Bo Gyeong} and Lee, {Jung Hee} and Kang, {In Man}",

year = "2017",

month = apr,

doi = "10.5573/JSTS.2017.17.2.230",

language = "English",

volume = "17",

pages = "230--238",

journal = "Journal of Semiconductor Technology and Science",

issn = "1598-1657",

publisher = "Institute of Electronics Engineers of Korea",

number = "2",

}

TY - JOUR

T1 - InGaAs-based tunneling field-effect transistor with stacked dual-metal gate with PNPN structure for high performance

AU - Kwon, Ra Hee

AU - Lee, Sang Hyuk

AU - Yoon, Young Jun

AU - Seo, Jae Hwa

AU - Jang, Young In

AU - Cho, Min Su

AU - Kim, Bo Gyeong

AU - Lee, Jung Hee

AU - Kang, In Man

PY - 2017/4

Y1 - 2017/4

N2 - We have proposed an InGaAs-based gate-all-around (GAA) tunneling field-effect transistor (TFET) with a stacked dual-metal gate (DMG). The electrical performances of the proposed TFET are evaluated through technology computer-aided design (TCAD) simulations. The simulation results show that the proposed TFET demonstrates improved DC performances including high on-state current (Ion) and steep subthreshold swing (S), in comparison with a single-metal gate (SMG) TFET with higher gate metal workfunction, as it has a thinner source-channel tunneling barrier width by low workfunction of source-side channel gate. The effects of the gate workfunction on Ion, the off-state current (Ioff), and S in the DMG-TFETs are examined. The DMG-TFETs with PNPN structure demonstrate outstanding DC performances and RF characteristics with a higher n-type doping concentration in the In0.8Ga0.2As source-side channel region.

AB - We have proposed an InGaAs-based gate-all-around (GAA) tunneling field-effect transistor (TFET) with a stacked dual-metal gate (DMG). The electrical performances of the proposed TFET are evaluated through technology computer-aided design (TCAD) simulations. The simulation results show that the proposed TFET demonstrates improved DC performances including high on-state current (Ion) and steep subthreshold swing (S), in comparison with a single-metal gate (SMG) TFET with higher gate metal workfunction, as it has a thinner source-channel tunneling barrier width by low workfunction of source-side channel gate. The effects of the gate workfunction on Ion, the off-state current (Ioff), and S in the DMG-TFETs are examined. The DMG-TFETs with PNPN structure demonstrate outstanding DC performances and RF characteristics with a higher n-type doping concentration in the In0.8Ga0.2As source-side channel region.

KW - Band-to-band tunneling (BTBT)

KW - Dual-metal gate

KW - InGaAs

KW - PNPN

KW - Tunneling field-effect transistors (TFETs)

UR - http://www.scopus.com/inward/record.url?scp=85018785988&partnerID=8YFLogxK

U2 - 10.5573/JSTS.2017.17.2.230

DO - 10.5573/JSTS.2017.17.2.230

M3 - Article

AN - SCOPUS:85018785988

SN - 1598-1657

VL - 17

SP - 230

EP - 238

JO - Journal of Semiconductor Technology and Science

JF - Journal of Semiconductor Technology and Science

IS - 2

ER -

InGaAs-based tunneling field-effect transistor with stacked dual-metal gate with PNPN structure for high performance

Abstract

Keywords

Access to Document

Other files and links

Fingerprint

Cite this