Instability in in_0.7 ga_0.3 as quantum-well mosfets with single-layer al₂ o₃ and bi-layer al₂ o₃ /hfo₂ gate stacks caused by charge trapping under positive bias temperature (pbt) stress

The instability of transistor characteristics caused by charge trapping under positive bias temperature (PBT) stress in In_0.7 Ga_0.3 As metal oxide semiconductor field-effect transistors (MOSFETs) with single-layer Al₂ O₃ and bi-layer Al₂ O₃ /HfO₂ gate stacks was investigated. The equivalent field across the multi-gate stacks was compared with a single layer used to compare the instability of electrical characteristics. The observed threshold voltage degradation (∆V_T) was consistent with the phenomenon of fast transient trapping of injected electrons at pre-existing shallow defects in the high-κ dielectric of HfO₂, in which this charging was recovered by applying a relaxation voltage. Excluding the fast-transient charging components, the power law exponent (n), with respect to the time-dependent threshold voltage degradation, ranged from 0.3 to 0.35 for both single-layer Al₂ O₃ and bi-layer Al₂ O₃ /HfO₂ gate stacks. This long-term (slow) V_T shift, which was strongly correlated with transconductance (G_m) degradation, was attributed to significant charge trapping in the border trap or/and defect sites within the high-κ dielectric.