Abstract
Wafer-level packaging is currently the major trend in semiconductor packaging for miniaturization and high-density integration. To ensure the package reliability, the wafer and substrate bumps utilized as connection junctions need to be in-line inspected as regards their top-height distribution, coplanarity, and volume uniformity. This article proposes a lateral scanning interferometric system for wafer bump shape inspection in three dimensions with a large field of view and fast inspection speed based on an optomechatronic system design. For multiple-peak interferogram from wafer bumps around a transparent film layer, two-step information extraction algorithms are suggested, including top surface profile and underlayer surface profile detection algorithms. The multiple-peak interferogram is acquired with variations of lateral position of the reference mirror by a piezoelectric transducer (PZT). A series of experiments is performed for representative wafer samples with solder and gold bumps, and the effectiveness of the proposed inspection system is verified from the test results.
| Original language | English |
|---|---|
| Pages (from-to) | 271-285 |
| Number of pages | 15 |
| Journal | International Journal of Optomechatronics |
| Volume | 5 |
| Issue number | 3 |
| DOIs | |
| State | Published - Jul 2011 |
Keywords
- 3-D measurement
- Lateral scanning interferometer
- Linnik interferometer
- Semiconductor inspection
- Wafer bump inspection
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