Logic performance of 40 nm InAs HEMTs

Dae Hyun Kim; Jesús A. Del Alamo

doi:10.1109/IEDM.2007.4419018

Logic performance of 40 nm InAs HEMTs

Dae Hyun Kim, Jesús A. Del Alamo

School of Electronics Engineering

Massachusetts Institute of Technology

Research output: Contribution to journal › Conference article › peer-review

48 Scopus citations

Abstract

We have experimentally evaluated the logic performance of 40 nm InAs HEMTs. For a barrier thickness of 4 nm, we find that 40 nm InAs HEMTs exhibit excellent logic figures of merit and scalability at V_DS = 0.5 V, such as DIBL = 80 mV/V, S = 70 mV/dec., and f_T = 475 GHz. These remarkable results arise from the combination of the outstanding transport properties of InAs channel, and the use of a thin insulator and a thin channel. In addition, these devices exhibit I_ON/I_OFF ratios in excess of 10⁴, revealing that band-to-band tunneling is not a significant concern in our device design. Our InAs HEMTs exhibit an injection velocity at the virtual source point that is a factor of 1.6X higher than state-of-the-art Si n-MOSFETs, in spite of the significantly lower supply voltage.

Original language	English
Article number	4419018
Pages (from-to)	629-632
Number of pages	4
Journal	Technical Digest - International Electron Devices Meeting
DOIs	https://doi.org/10.1109/IEDM.2007.4419018
State	Published - 2007
Event	2007 IEEE International Electron Devices Meeting, IEDM - Washington, DC, United States Duration: 10 Dec 2007 → 12 Dec 2007

Access to Document

10.1109/IEDM.2007.4419018

Cite this

@article{4fba323f69504dde8986817cbf3437fa,

title = "Logic performance of 40 nm InAs HEMTs",

abstract = "We have experimentally evaluated the logic performance of 40 nm InAs HEMTs. For a barrier thickness of 4 nm, we find that 40 nm InAs HEMTs exhibit excellent logic figures of merit and scalability at VDS = 0.5 V, such as DIBL = 80 mV/V, S = 70 mV/dec., and fT = 475 GHz. These remarkable results arise from the combination of the outstanding transport properties of InAs channel, and the use of a thin insulator and a thin channel. In addition, these devices exhibit ION/IOFF ratios in excess of 104, revealing that band-to-band tunneling is not a significant concern in our device design. Our InAs HEMTs exhibit an injection velocity at the virtual source point that is a factor of 1.6X higher than state-of-the-art Si n-MOSFETs, in spite of the significantly lower supply voltage.",

author = "Kim, {Dae Hyun} and {Del Alamo}, {Jes{\'u}s A.}",

year = "2007",

doi = "10.1109/IEDM.2007.4419018",

language = "English",

pages = "629--632",

journal = "Technical Digest - International Electron Devices Meeting",

issn = "0163-1918",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "2007 IEEE International Electron Devices Meeting, IEDM ; Conference date: 10-12-2007 Through 12-12-2007",

}

TY - JOUR

T1 - Logic performance of 40 nm InAs HEMTs

AU - Kim, Dae Hyun

AU - Del Alamo, Jesús A.

PY - 2007

Y1 - 2007

N2 - We have experimentally evaluated the logic performance of 40 nm InAs HEMTs. For a barrier thickness of 4 nm, we find that 40 nm InAs HEMTs exhibit excellent logic figures of merit and scalability at VDS = 0.5 V, such as DIBL = 80 mV/V, S = 70 mV/dec., and fT = 475 GHz. These remarkable results arise from the combination of the outstanding transport properties of InAs channel, and the use of a thin insulator and a thin channel. In addition, these devices exhibit ION/IOFF ratios in excess of 104, revealing that band-to-band tunneling is not a significant concern in our device design. Our InAs HEMTs exhibit an injection velocity at the virtual source point that is a factor of 1.6X higher than state-of-the-art Si n-MOSFETs, in spite of the significantly lower supply voltage.

AB - We have experimentally evaluated the logic performance of 40 nm InAs HEMTs. For a barrier thickness of 4 nm, we find that 40 nm InAs HEMTs exhibit excellent logic figures of merit and scalability at VDS = 0.5 V, such as DIBL = 80 mV/V, S = 70 mV/dec., and fT = 475 GHz. These remarkable results arise from the combination of the outstanding transport properties of InAs channel, and the use of a thin insulator and a thin channel. In addition, these devices exhibit ION/IOFF ratios in excess of 104, revealing that band-to-band tunneling is not a significant concern in our device design. Our InAs HEMTs exhibit an injection velocity at the virtual source point that is a factor of 1.6X higher than state-of-the-art Si n-MOSFETs, in spite of the significantly lower supply voltage.

UR - http://www.scopus.com/inward/record.url?scp=48649096271&partnerID=8YFLogxK

U2 - 10.1109/IEDM.2007.4419018

DO - 10.1109/IEDM.2007.4419018

M3 - Conference article

AN - SCOPUS:48649096271

SN - 0163-1918

SP - 629

EP - 632

JO - Technical Digest - International Electron Devices Meeting

JF - Technical Digest - International Electron Devices Meeting

M1 - 4419018

T2 - 2007 IEEE International Electron Devices Meeting, IEDM

Y2 - 10 December 2007 through 12 December 2007

ER -

Logic performance of 40 nm InAs HEMTs

Abstract

Access to Document

Other files and links

Fingerprint

Cite this