Abstract
This paper presents a semi-systolic Montgomery multiplier based on the redundant basis representation of the finite field elements. The proposed multiplier has less hardware and time complexities compared to related multipliers. We also propose a serial systolic Montgomery multiplier that can be applied well in space-limited hardware. Furthermore, a simple inversion based on the proposed scheme is presented.
| Original language | English |
|---|---|
| Article number | 20140713 |
| Journal | IEICE Electronics Express |
| Volume | 11 |
| Issue number | 20 |
| DOIs | |
| State | Published - 3 Oct 2014 |
Keywords
- Finite field arithmetic
- Modular multiplication
- Systolic array
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