Abstract
A report is presented on 100nm and 200nm InAs PHEMTs on an InP substrate with a record fT performance. This result was obtained by reducing a parasitic delay associated with the extrinsic gate capacitances of the device, as well as by using an InAs sub-channel to improve carrier transport properties. In particular, a 100nm InAs PHEMT exhibits excellent performance, such as gm,max=2 S/mm, fT=421GHz and fmax=620GHz at VDS=0.7 V. The device also shows a well-balanced fT and fmax in excess of 400GHz, even at VDS=0.5 V. In addition, the device gains about 70% improvement in fT as Lg shrinks down from 200 to 100nm. The results obtained in this work should make this technology of great interest to a multiplicity of applications and guide a realistic path in trying to achieve a 1 THz fT from III-V HEMTs in the future.
Original language | English |
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Pages (from-to) | 1352-1353 |
Number of pages | 2 |
Journal | Electronics Letters |
Volume | 48 |
Issue number | 21 |
DOIs | |
State | Published - 11 Oct 2012 |