LW-ResGRU DPD: Layer-Wise Residual GRU for Low-Latency DPD in Nonlinear RF Systems

This brief presents LW-ResGRU, a layer-wise residual GRU architecture for low-latency digital predistortion (DPD) of power amplifiers (PAs) under hardware constraints. Conventional RNN-based DPD suffers from three hardware bottlenecks: high-sampling-rate demands, sequential hidden-state dependencies that limit pipelining, and the latency–accuracy trade-off from large hidden sizes. LW-ResGRU addresses these issues by injecting residual connections at every recurrent layer, enabling stable depth scaling even with reduced hidden sizes. All models were evaluated on the OpenDPD DPA 200 MHz dataset (13.4 dBm output, PAPR = 9.6–11 dB) under an equal parameter budget (<600). With H=5, LW-ResGRU achieved Normalized Mean Square Error (NMSE) = -43.5 dB, Error Vector Magnitude (EVM) = -46.7 dB, and Adjacent Channel Power Ratio (ACPR) (Left/Right) = -50.4/−47.8 dBc, outperforming baseline RNN-based DPD models. Hardware feasibility was further confirmed by FPGA HLS synthesis, demonstrating the potential for real-time deployment.