@inproceedings{8be6ae35fa59427fb3cbe2a33ea200aa,
title = "Memcapacitor based Minimum and Maximum Gate Design",
abstract = "In this paper, we suggest a new structure of complementary capacitive switch that is composed of two connected memcapacitors. We also propose MIN and MAX gates that use this structure. HSPICE simulation verified the behavior of these logic gates for a specific input pattern. The functionality of each logic gate was verified even for analog signal processing, and these logic gates will be useful in fuzzy logic processing.",
keywords = "Fuzzy Logic, Logic Gate, Memcapacitor",
author = "Jiyoung Min and Sunmean Kim and Seokhyeong Kang",
note = "Publisher Copyright: {\textcopyright} 2021 IEEE.; 18th International System-on-Chip Design Conference, ISOCC 2021 ; Conference date: 06-10-2021 Through 09-10-2021",
year = "2021",
doi = "10.1109/ISOCC53507.2021.9613984",
language = "English",
series = "Proceedings - International SoC Design Conference 2021, ISOCC 2021",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "75--76",
booktitle = "Proceedings - International SoC Design Conference 2021, ISOCC 2021",
address = "United States",
}