Minimizing Input Current Ripple for Four-Phase Input-Parallel Output-Series DC-DC Converter With Phase-Shift Modulation

Dai Van Bui, Honnyong Cha

Research output: Contribution to journalArticlepeer-review

13 Scopus citations

Abstract

This letter proposes a pulsewidth modulation (PWM) scheme based on phase-shift modulation for the four-phase input-parallel output-series (4P-IPOS) converter. And operation with dual-output configuration is investigated. The natural output voltages and inductor currents balancing can be achieved even without any extra components or dedicated control. In addition, compared with the conventional PWM scheme, performance improves. The input current ripple is reduced significantly at high voltage gain. An 800-W prototype of the 4P-IPOS converter was built and tested to verify the performance of the suggested scheme.

Original languageEnglish
Pages (from-to)8005-8010
Number of pages6
JournalIEEE Transactions on Power Electronics
Volume38
Issue number7
DOIs
StatePublished - 1 Jul 2023

Keywords

  • Current balancing
  • input-parallel output-series (IPOS) converter
  • pulsewidth modulation (PWM)
  • ripple cancellation
  • voltage balancing

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