Multi-layer tunnel barrier (Ta2O5/TaO x/TiO2) engineering for bipolar RRAM selector applications

Jiyong Woo; Wootae Lee; Sangsu Park; Seonghyun Kim; Daeseok Lee; Godeuni Choi; Euijun Cha; Ji Hyun Lee; Woo Young Jung; Chan Gyung Park; Hyunsang Hwang

Multi-layer tunnel barrier (Ta₂O₅/TaO _x/TiO₂) engineering for bipolar RRAM selector applications

Jiyong Woo
, Wootae Lee
, Sangsu Park
, Seonghyun Kim
, Daeseok Lee
, Godeuni Choi
, Euijun Cha
, Ji Hyun Lee
, Woo Young Jung
, Chan Gyung Park
, Hyunsang Hwang

School of Electronics Engineering

Gwangju Institute of Science and Technology
Pohang University of Science and Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

29 Scopus citations

Abstract

Ultrathin stoichiometric Ta₂O₅ layer, which was formed by thermal oxidation of Ta layer on ALD TiO₂, exhibits excellent selector characteristics. To maximize the selector performance, we adopted various interface engineering techniques such as Ta₂O ₅ thickness, control of oxygen profile in TaO_x layer, top electrode materials, and band gap of bottom insulating oxide layer. By optimizing process conditions, we obtained outstanding selector performances such as high current density (>10⁷A/cm²), high selectivity (∼10⁴), better off-current (<100nA) and excellent reliabilities. Furthermore, the selector was fabricated in 1K cross-point array and vertically-integrated with Conductive-Bridge RAM (CBRAM).

Original language	English
Title of host publication	2013 Symposium on VLSI Technology, VLSIT 2013 - Digest of Technical Papers
Pages	T168-T169
State	Published - 2013
Event	2013 Symposium on VLSI Technology, VLSIT 2013 - Kyoto, Japan Duration: 11 Jun 2013 → 13 Jun 2013

Publication series

Name	Digest of Technical Papers - Symposium on VLSI Technology
ISSN (Print)	0743-1562

Conference

Conference	2013 Symposium on VLSI Technology, VLSIT 2013
Country/Territory	Japan
City	Kyoto
Period	11/06/13 → 13/06/13

Cite this

Woo, J., Lee, W., Park, S., Kim, S., Lee, D., Choi, G., Cha, E., Lee, J. H., Jung, W. Y., Park, C. G., & Hwang, H. (2013). Multi-layer tunnel barrier (Ta₂O₅/TaO _x/TiO₂) engineering for bipolar RRAM selector applications. In 2013 Symposium on VLSI Technology, VLSIT 2013 - Digest of Technical Papers (pp. T168-T169). Article 6576644 (Digest of Technical Papers - Symposium on VLSI Technology).

@inproceedings{860a33773f9a444c8065668d5046736b,

title = "Multi-layer tunnel barrier (Ta2O5/TaO x/TiO2) engineering for bipolar RRAM selector applications",

abstract = "Ultrathin stoichiometric Ta2O5 layer, which was formed by thermal oxidation of Ta layer on ALD TiO2, exhibits excellent selector characteristics. To maximize the selector performance, we adopted various interface engineering techniques such as Ta2O 5 thickness, control of oxygen profile in TaOx layer, top electrode materials, and band gap of bottom insulating oxide layer. By optimizing process conditions, we obtained outstanding selector performances such as high current density (>107A/cm2), high selectivity (∼104), better off-current (<100nA) and excellent reliabilities. Furthermore, the selector was fabricated in 1K cross-point array and vertically-integrated with Conductive-Bridge RAM (CBRAM).",

author = "Jiyong Woo and Wootae Lee and Sangsu Park and Seonghyun Kim and Daeseok Lee and Godeuni Choi and Euijun Cha and Lee, \{Ji Hyun\} and Jung, \{Woo Young\} and Park, \{Chan Gyung\} and Hyunsang Hwang",

year = "2013",

language = "English",

isbn = "9784863483477",

series = "Digest of Technical Papers - Symposium on VLSI Technology",

pages = "T168--T169",

booktitle = "2013 Symposium on VLSI Technology, VLSIT 2013 - Digest of Technical Papers",

note = "2013 Symposium on VLSI Technology, VLSIT 2013 ; Conference date: 11-06-2013 Through 13-06-2013",

}

Woo, J, Lee, W, Park, S, Kim, S, Lee, D, Choi, G, Cha, E, Lee, JH, Jung, WY, Park, CG & Hwang, H 2013, Multi-layer tunnel barrier (Ta₂O₅/TaO _x/TiO₂) engineering for bipolar RRAM selector applications. in 2013 Symposium on VLSI Technology, VLSIT 2013 - Digest of Technical Papers., 6576644, Digest of Technical Papers - Symposium on VLSI Technology, pp. T168-T169, 2013 Symposium on VLSI Technology, VLSIT 2013, Kyoto, Japan, 11/06/13.

Multi-layer tunnel barrier (Ta₂O₅/TaO _x/TiO₂) engineering for bipolar RRAM selector applications. / Woo, Jiyong; Lee, Wootae; Park, Sangsu et al.
2013 Symposium on VLSI Technology, VLSIT 2013 - Digest of Technical Papers. 2013. p. T168-T169 6576644 (Digest of Technical Papers - Symposium on VLSI Technology).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Multi-layer tunnel barrier (Ta2O5/TaO x/TiO2) engineering for bipolar RRAM selector applications

AU - Woo, Jiyong

AU - Lee, Wootae

AU - Park, Sangsu

AU - Kim, Seonghyun

AU - Lee, Daeseok

AU - Choi, Godeuni

AU - Cha, Euijun

AU - Lee, Ji Hyun

AU - Jung, Woo Young

AU - Park, Chan Gyung

AU - Hwang, Hyunsang

PY - 2013

Y1 - 2013

N2 - Ultrathin stoichiometric Ta2O5 layer, which was formed by thermal oxidation of Ta layer on ALD TiO2, exhibits excellent selector characteristics. To maximize the selector performance, we adopted various interface engineering techniques such as Ta2O 5 thickness, control of oxygen profile in TaOx layer, top electrode materials, and band gap of bottom insulating oxide layer. By optimizing process conditions, we obtained outstanding selector performances such as high current density (>107A/cm2), high selectivity (∼104), better off-current (<100nA) and excellent reliabilities. Furthermore, the selector was fabricated in 1K cross-point array and vertically-integrated with Conductive-Bridge RAM (CBRAM).

AB - Ultrathin stoichiometric Ta2O5 layer, which was formed by thermal oxidation of Ta layer on ALD TiO2, exhibits excellent selector characteristics. To maximize the selector performance, we adopted various interface engineering techniques such as Ta2O 5 thickness, control of oxygen profile in TaOx layer, top electrode materials, and band gap of bottom insulating oxide layer. By optimizing process conditions, we obtained outstanding selector performances such as high current density (>107A/cm2), high selectivity (∼104), better off-current (<100nA) and excellent reliabilities. Furthermore, the selector was fabricated in 1K cross-point array and vertically-integrated with Conductive-Bridge RAM (CBRAM).

UR - https://www.scopus.com/pages/publications/84883380683

M3 - Conference contribution

AN - SCOPUS:84883380683

SN - 9784863483477

T3 - Digest of Technical Papers - Symposium on VLSI Technology

SP - T168-T169

BT - 2013 Symposium on VLSI Technology, VLSIT 2013 - Digest of Technical Papers

T2 - 2013 Symposium on VLSI Technology, VLSIT 2013

Y2 - 11 June 2013 through 13 June 2013

ER -

Multi-layer tunnel barrier (Ta₂O₅/TaO _x/TiO₂) engineering for bipolar RRAM selector applications

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