On enhancing power benefits in 3D ics: Block folding and bonding styles perspective

Moongon Jung, Taigon Song, Yang Wan, Yarui Peng, Sung Kyu Lim

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

27 Scopus citations

Abstract

Low power is widely considered as a key benefit of 3D ICs, yet there have been few thorough design studies on how to maximize power benefits in 3D ICs. In this paper, we present design method- ologies to reduce power consumption in 3D ICs using a large-scale commercial-grade microprocessor (OpenSPARC T2). To further improve power benefits in 3D ICs on top of the traditional 3D floor- planning, we study the impact of block folding and bonding styles. We also develop an effective method to place face-to-face vias for our 2-tier 3D design for power optimization. With aforementioned methods combined, our 3D designs provide up to 20.3% power re- duction over the 2D counterpart under the same performance.

Original languageEnglish
Title of host publicationDAC 2014 - 51st Design Automation Conference, Conference Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781479930173
DOIs
StatePublished - 2014
Event51st Annual Design Automation Conference, DAC 2014 - San Francisco, CA, United States
Duration: 2 Jun 20145 Jun 2014

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X

Conference

Conference51st Annual Design Automation Conference, DAC 2014
Country/TerritoryUnited States
CitySan Francisco, CA
Period2/06/145/06/14

Keywords

  • 3D IC
  • Block folding
  • Bonding style
  • Power benefit

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