Optimizing Collector-Emitter Saturation Voltage at 3000 V Insulated Gate Bipolar Transistors Using Laser Thermal Annealing

In this work, two thermal annealing processes (furnace and laser annealing) are adopted to obtain < 2.0 V collector-emitter saturation voltage (V _ce (sat)), an important device parameter giving an effect on switching speed and power consumption of > 3000 V breakdown voltage in insulated gate bipolar transistors (IGBTs) for propulsion control system of electric vehicles. In furnace annealing process (450 °C for 30 min), the parameter of V _ce (sat) is 5.5–6.5 V once measuring at I _c = 2.0 A with EDS(electrical die sorting) analyser. However, annealing process was performed using a laser equipment to lower the V _ce (sat). After back side grinding and back side implant, the sample wafer undergoes laser annealing process. From various annealing conditions it was found that the V _ce (sat) was 1.6–1.7 V when measuring at collector current (I _c ) of 2.0 A after annealing at pulse with of 1100 nm, 3-overlap and 3.5 J/cm ² . From these results, it is found that the V _ce (sat) is lower as increasing laser energy density and overlapping and the well-distributed V _ce (sat) values over the entire chips appear as widening the laser pulse.