Parallel pass based BPC design in JPEG2000

Tae Yoon Ki; Sub Kwak Chang; Rim Choi Jun; Ho Park Kun; Soo Han Seung

doi:10.1109/ICICISYS.2009.5357652

Parallel pass based BPC design in JPEG2000

Tae Yoon Ki, Sub Kwak Chang, Rim Choi Jun, Ho Park Kun, Soo Han Seung

School of Electronics Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

JPEG2000 will be the international standard to continuous-tone still image coding in next generation. JPEG2000 algorithm is different from JPEG algorithm in filtering and entropy coding. In this thesis, we propose BPC hardware design based on parallel pass to improve performance. Hardware module which performs the bit plane coding (BPC) operation is designed by Verilog-HDL and synthesized by QuartusII. As a result of implementing BPC hardware, a speed gain of about 2 times is achieved when a process did BPC by based on serial pass.

Original language	English
Title of host publication	Proceedings - 2009 IEEE International Conference on Intelligent Computing and Intelligent Systems, ICIS 2009
Pages	440-443
Number of pages	4
DOIs	https://doi.org/10.1109/ICICISYS.2009.5357652
State	Published - 2009
Event	2009 IEEE International Conference on Intelligent Computing and Intelligent Systems, ICIS 2009 - Shanghai, China Duration: 20 Nov 2009 → 22 Nov 2009

Publication series

Name	Proceedings - 2009 IEEE International Conference on Intelligent Computing and Intelligent Systems, ICIS 2009
Volume	4

Conference

Conference	2009 IEEE International Conference on Intelligent Computing and Intelligent Systems, ICIS 2009
Country/Territory	China
City	Shanghai
Period	20/11/09 → 22/11/09

Keywords

Bit plane coding
BPC
EBCOT
JPEG2000
Parallel pass
Tier-1

Access to Document

10.1109/ICICISYS.2009.5357652

Cite this

Ki, T. Y., Chang, S. K., Jun, R. C., Kun, H. P., & Seung, S. H. (2009). Parallel pass based BPC design in JPEG2000. In Proceedings - 2009 IEEE International Conference on Intelligent Computing and Intelligent Systems, ICIS 2009 (pp. 440-443). Article 5357652 (Proceedings - 2009 IEEE International Conference on Intelligent Computing and Intelligent Systems, ICIS 2009; Vol. 4). https://doi.org/10.1109/ICICISYS.2009.5357652

@inproceedings{271d7d0e72094afd927e0007e2c27c42,

title = "Parallel pass based BPC design in JPEG2000",

abstract = "JPEG2000 will be the international standard to continuous-tone still image coding in next generation. JPEG2000 algorithm is different from JPEG algorithm in filtering and entropy coding. In this thesis, we propose BPC hardware design based on parallel pass to improve performance. Hardware module which performs the bit plane coding (BPC) operation is designed by Verilog-HDL and synthesized by QuartusII. As a result of implementing BPC hardware, a speed gain of about 2 times is achieved when a process did BPC by based on serial pass.",

keywords = "Bit plane coding, BPC, EBCOT, JPEG2000, Parallel pass, Tier-1",

author = "Ki, {Tae Yoon} and Chang, {Sub Kwak} and Jun, {Rim Choi} and Kun, {Ho Park} and Seung, {Soo Han}",

year = "2009",

doi = "10.1109/ICICISYS.2009.5357652",

language = "English",

isbn = "9781424447541",

series = "Proceedings - 2009 IEEE International Conference on Intelligent Computing and Intelligent Systems, ICIS 2009",

pages = "440--443",

booktitle = "Proceedings - 2009 IEEE International Conference on Intelligent Computing and Intelligent Systems, ICIS 2009",

note = "2009 IEEE International Conference on Intelligent Computing and Intelligent Systems, ICIS 2009 ; Conference date: 20-11-2009 Through 22-11-2009",

}

Ki, TY, Chang, SK, Jun, RC, Kun, HP & Seung, SH 2009, Parallel pass based BPC design in JPEG2000. in Proceedings - 2009 IEEE International Conference on Intelligent Computing and Intelligent Systems, ICIS 2009., 5357652, Proceedings - 2009 IEEE International Conference on Intelligent Computing and Intelligent Systems, ICIS 2009, vol. 4, pp. 440-443, 2009 IEEE International Conference on Intelligent Computing and Intelligent Systems, ICIS 2009, Shanghai, China, 20/11/09. https://doi.org/10.1109/ICICISYS.2009.5357652

Parallel pass based BPC design in JPEG2000. / Ki, Tae Yoon; Chang, Sub Kwak; Jun, Rim Choi et al.
Proceedings - 2009 IEEE International Conference on Intelligent Computing and Intelligent Systems, ICIS 2009. 2009. p. 440-443 5357652 (Proceedings - 2009 IEEE International Conference on Intelligent Computing and Intelligent Systems, ICIS 2009; Vol. 4).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Chang, Sub Kwak

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AU - Kun, Ho Park

AU - Seung, Soo Han

PY - 2009

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N2 - JPEG2000 will be the international standard to continuous-tone still image coding in next generation. JPEG2000 algorithm is different from JPEG algorithm in filtering and entropy coding. In this thesis, we propose BPC hardware design based on parallel pass to improve performance. Hardware module which performs the bit plane coding (BPC) operation is designed by Verilog-HDL and synthesized by QuartusII. As a result of implementing BPC hardware, a speed gain of about 2 times is achieved when a process did BPC by based on serial pass.

AB - JPEG2000 will be the international standard to continuous-tone still image coding in next generation. JPEG2000 algorithm is different from JPEG algorithm in filtering and entropy coding. In this thesis, we propose BPC hardware design based on parallel pass to improve performance. Hardware module which performs the bit plane coding (BPC) operation is designed by Verilog-HDL and synthesized by QuartusII. As a result of implementing BPC hardware, a speed gain of about 2 times is achieved when a process did BPC by based on serial pass.

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KW - BPC

KW - EBCOT

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BT - Proceedings - 2009 IEEE International Conference on Intelligent Computing and Intelligent Systems, ICIS 2009

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Ki TY, Chang SK, Jun RC, Kun HP, Seung SH. Parallel pass based BPC design in JPEG2000. In Proceedings - 2009 IEEE International Conference on Intelligent Computing and Intelligent Systems, ICIS 2009. 2009. p. 440-443. 5357652. (Proceedings - 2009 IEEE International Conference on Intelligent Computing and Intelligent Systems, ICIS 2009). doi: 10.1109/ICICISYS.2009.5357652

Parallel pass based BPC design in JPEG2000

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