@inproceedings{bc9b2b2f373f418cb59b37b1245c1d1a,
title = "Performance of Large-Scale Electronic Structure Calculations on Built-in FPGA Systems",
abstract = "We discuss the feasibility of an in-house Schr{\"o}dinger equation solver on the Intel Broadwell Xeon processor with a built-in FPGA, with a particular focus on the performance of large-scale sparse matrix-vector multiplication (SpMV) that is the core numerical operation of electronic structure simulations for multi-million atomic systems. The double-precision SpMV section in our solver is offloaded to FPGA using OpenCL SDK tool chain presented by Intel corporation. Memory-pinning and duplication of compute unit are employed to improve the performance, where we find that memory-pinning and duplication of compute units lead 1.64x faster data-Transfer and 1.58x speed-up of SpMV, respectively, against the result with a single compute unit and no pinned memory.",
keywords = "Built-in FPGA, Electronic Structure Simulations, Lanczos Iterations, OpenCL",
author = "Seungmin Lee and Dukyun Nam and Hoon Ryu",
note = "Publisher Copyright: {\textcopyright} 2017 IEEE.; 2017 IEEE International Conference on Cluster Computing, CLUSTER 2017 ; Conference date: 05-09-2017 Through 08-09-2017",
year = "2017",
month = sep,
day = "22",
doi = "10.1109/CLUSTER.2017.37",
language = "English",
series = "Proceedings - IEEE International Conference on Cluster Computing, ICCC",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "635--636",
booktitle = "Proceedings - 2017 IEEE International Conference on Cluster Computing, CLUSTER 2017",
address = "United States",
}